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2014-12-11Revert "arm: ls1021a: remove the FSL_SOC config added by SOC_LS1021A"Jingchang Lu
This reverts commit 14bbc976701a2ebc62343d3122e5ff772060a35f. LS1021A shares IPs with sophisticated PowerPC platform, many PowerPC drivers have depends on FSL_SOC defination, so to consistent with this, FSL_SOC is introduced. Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com> Change-Id: Ie5a69b78d317d09f9fee54dde3f1cd4bffdb9588 Reviewed-on: http://git.am.freescale.net:8181/19915 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Li Xiubo <Li.Xiubo@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11arm:dts:ls1021a: add PCIe device nodeMinghuan Lian
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Change-Id: I5deb88a99bd7b5d40251a4935d4d8a556abad7ae Reviewed-on: http://git.am.freescale.net:8181/19712 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Jingchang Lu <jingchang.lu@freescale.com> Reviewed-by: Mingkai Hu <Mingkai.Hu@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11arm: ls1021a: remove dma_zone_size definationJingchang Lu
CONFIG_ZONE_DMA is enough to claim the dma limitation, and no need for limitation smaller than 4GB, so remove the dma_zone_size defination. Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com> --- the upstream include this change in patchwork is: https://patchwork.kernel.org/patch/4946151/ Change-Id: Ia2ed1fd18519e1e2553e2aa8ce1c1729657a6ed3 Reviewed-on: http://git.am.freescale.net:8181/19874 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Li Xiubo <Li.Xiubo@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11arm: configs: ls1021a: enable LTC2945, WDT and CLK_QOIRQJingchang Lu
Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com> Change-Id: I7cde95ba1ca9acbf6d2d01649b3ecb3d08db02c1 Reviewed-on: http://git.am.freescale.net:8181/19912 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Hongtao Jia <hongtao.jia@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11Add LTC2945 node to ls1021a-twr.dtsJia Hongtao
Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com> Change-Id: I08008c3dcd2b85b0c54b9f9ee939287f57745517 Reviewed-on: http://git.am.freescale.net:8181/19641 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Jingchang Lu <jingchang.lu@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11arm: dts: ls1021a: add wakeup device ftm0 node for ls1021aWang Dongsheng
Add ftm0 node, cause of ftm0 can be set as a alarm before system going to deep sleep. Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> Change-Id: Ie337ec554f6acd625cd691a0e07ffb96807cfa10 Reviewed-on: http://git.am.freescale.net:8181/19838 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Li Xiubo <Li.Xiubo@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11arm : dts : ls1021a : Modify USB3.0 dts nodeSuresh Gupta
Signed-off-by: Suresh Gupta <suresh.gupta@freescale.com> Change-Id: I7aa37e4914623a303eb520c6d8fd6d4f84e9ddb2 Reviewed-on: http://git.am.freescale.net:8181/19815 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Jingchang Lu <jingchang.lu@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11arm : dts : ls1021a : Remove unwanted code from USB2.0 dts nodeNikhil Badola
Remove #address-cells and #size-cells from USB 2.0 node in ls1021a Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Change-Id: Ia2ff9aea201ef18b352437bda267571c235db689 Reviewed-on: http://git.am.freescale.net:8181/15675 Reviewed-by: Jingchang Lu <jingchang.lu@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com> Tested-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11arm: dts: ls1021a: add alias for the clockgen sysclk nodeJingchang Lu
This add an alias named sysclk for the sysclk node for fdt fixup procedure locating it uniquely. Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com> Change-Id: I7e6bd6cb4d81fe44c73944be91cab3fe56810094 Reviewed-on: http://git.am.freescale.net:8181/19199 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Huan Wang <alison.wang@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com> Tested-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11arm: dts: ls1021a: change sysclk compatible to "fixed-clock"Jingchang Lu
The sysclk could be well probed by "fixed-clock" compatible, no custom compatible is needed any more. Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com> Change-Id: I17a21e20ced4304e716e5a9ba07ff56b2adb45a7 Reviewed-on: http://git.am.freescale.net:8181/17833 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Huan Wang <alison.wang@freescale.com> Reviewed-by: Li Xiubo <Li.Xiubo@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11arm: dts: ls1021a: remove the tbi node from SoC level dtsJingchang Lu
remove the tbi node which will be added to boards level dts. Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com> Change-Id: I1b7893526e63d0207637f2ae0576c9d5f62a6a06 Reviewed-on: http://git.am.freescale.net:8181/17829 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Huan Wang <alison.wang@freescale.com> Reviewed-by: Li Xiubo <Li.Xiubo@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11arm: dts: ls1021a-twr: add aliases for enet phyJingchang Lu
This add aliases for enet phy to make it be found easily in u-boot on dynamically change the enet "phy-handle" and "phy-connection-type" property. Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com> Change-Id: I60e19aa48856c9b9048415d1c8924b626d70332a Reviewed-on: http://git.am.freescale.net:8181/17831 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Huan Wang <alison.wang@freescale.com> Reviewed-by: Li Xiubo <Li.Xiubo@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11arm: dts: ls1021a-qds: add tbi node and aliases for enet phyJingchang Lu
This move the tbi node to boards level device tree source. And add aliases for enet phy to make it be found easily by u-boot on dynamically change the enet "phy-handle" and "phy-connection-type" property. Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com> Change-Id: I80748fdbbeab06cb5804128600369317dbececd6 Reviewed-on: http://git.am.freescale.net:8181/17830 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Huan Wang <alison.wang@freescale.com> Reviewed-by: Li Xiubo <Li.Xiubo@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11arm: ls1021a: remove the FSL_SOC config added by SOC_LS1021AJingchang Lu
Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com> Change-Id: I2deac22e04a04c2523c7839d5974a41288e5bb2b Reviewed-on: http://git.am.freescale.net:8181/17837 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Huan Wang <alison.wang@freescale.com> Reviewed-by: Li Xiubo <Li.Xiubo@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11arm: dts: ls1021a: change duart compatible to "fsl,16550-FIFO64"Jingchang Lu
this patch change the duart compatible to 64-byte FIFO mode. Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com> Change-Id: I4d306671daed4262a6f354a3507304d82468c41d Reviewed-on: http://git.am.freescale.net:8181/17835 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Huan Wang <alison.wang@freescale.com> Reviewed-by: Li Xiubo <Li.Xiubo@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11arm: configs: add Freescale LS1021A initial defconfigJingchang Lu
Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com> Change-Id: Ia3ba1dbeb66d4c929cfe19122d221a2af36377f8 Reviewed-on: http://git.am.freescale.net:8181/17838 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Huan Wang <alison.wang@freescale.com> Reviewed-by: Li Xiubo <Li.Xiubo@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11ARM: imx: Add Freescale LS1021A SMP supportJingchang Lu
Freescale LS1021A SoC deploys two cortex-A7 processors, this adds bring-up support for the secondary core. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com> --- This patch has been sent to upstream for review: https://patchwork.kernel.org/patch/4464481/
2014-12-11ARM: imx: Add initial support for Freescale LS1021AJingchang Lu
The LS1021A SoC is a dual-core Cortex-A7 based processor, this add the initial support for it. Signed-off-by: Jingchang Lu <b35083@freescale.com> --- This patch has been sent to upstream for review: https://patchwork.kernel.org/patch/4464451/
2014-12-11ARM: dts: Add initial LS1021A TWR board dts supportJingchang Lu
Signed-off-by: Chen Lu <B46807@freescale.com> Signed-off-by: Chao Fu <B44548@freescale.com> Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com> --- This patch has been sent to upstream for review: https://patchwork.kernel.org/patch/4464461/
2014-12-11ARM: dts: Add initial LS1021A QDS board dts supportJingchang Lu
Signed-off-by: Alison Wang <alison.wang@freescale.com> Signed-off-by: Chao Fu <B44548@freescale.com> Signed-off-by: Jason Jin <Jason.Jin@freescale.com> Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Zhao Qiang <B45475@freescale.com> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Signed-off-by: Jaiprakash Singh <b44839@freescale.com> Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com> --- This patch has been sent to upstream for review: https://patchwork.kernel.org/patch/4464471/
2014-12-11ARM: dts: Add SoC level device tree support for LS1021AJingchang Lu
Add Freescale LS1021A SoC device tree support Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com> Signed-off-by: Suresh Gupta <suresh.gupta@freescale.com> Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Adrian Sendroiu <adrian.sendroiu@freescale.com> Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Signed-off-by: Jaiprakash Singh <b44839@freescale.com> Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Chao Fu <b44548@freescale.com> Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Zhao Qiang <B45475@freescale.com> Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com> Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com> --- This patch has been sent to upstream for review: https://patchwork.kernel.org/patch/4464491/
2014-12-11ARM: call of_clk_init from default time_init handlerSebastian Hesselbarth
Most DT ARM machs require common clock providers initialized before timers. Currently, arch/arm machs use .init_time to call of_clk_init right before clocksource_of_init. This prevents to remove that callback and use the default one instead. This patch adds a call to of_clk_init() to the default .init_time callback for COMMON_CLK enabled machs to allow to remove custom callbacks where applicable. While at it, also reorder includes alphabetically. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> --- This patch is pulled back from upstream: commit 4178bac4f6e955869395b30246687d41183a5edb
2014-12-11powerpc/e6500: Work around erratum A-008139Scott Wood
Erratum A-008139 can cause duplicate TLB entries if an indirect entry is overwritten using tlbwe while the other thread is using it to do a lookup. Work around this by using tlbilx to invalidate prior to overwriting. To avoid the need to save another register to hold MAS1 during the workaround code, TID clearing has been moved from tlb_miss_kernel_e6500 until after the SMT section. Signed-off-by: Scott Wood <scottwood@freescale.com> (cherry picked from commit 48cd9b5d590aee1664170968a9eae068e36761eb) Change-Id: I34cc02219f9081dbf8ff7729677a995b7a8bb4c5 Reviewed-on: http://git.am.freescale.net:8181/19463 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Scott Wood <scottwood@freescale.com> Reviewed-by: Mihai Caraman <mihai.caraman@freescale.com> Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
2014-10-19fmd: add new dtsi file for fmanV3LMandy Lavi
Change-Id: I65f6c770784cdf4ff8e5a16283597aec86daee56 Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/17428 Reviewed-by: Igal Liberman <Igal.Liberman@freescale.com> Reviewed-by: Mandy Lavi <Mandy.Lavi@freescale.com> Tested-by: Mandy Lavi <Mandy.Lavi@freescale.com>
2014-09-17qe-tdm: move siram_init_flag to qe.cZhao Qiang
Signed-off-by: Zhao Qiang <B45475@freescale.com> Change-Id: Id21f861ffec995ad68378a9d2eda245ef989b489 Reviewed-on: http://git.am.freescale.net:8181/19009 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Xiaobo Xie <X.Xie@freescale.com> Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
2014-09-17qe-hdlc: qe-hdlc work in normal mode instead of internal-loopback modeZhao Qiang
qe-hdlc worked in internal-loopback without TDMR ds26522, now it can work with TDMR ds26522 in normal mode, so modify it to normal mode. Signed-off-by: Zhao Qiang <B45475@freescale.com> Change-Id: I7eeb4ec196d74cb53f3bffced0889637c72ed5d6 Reviewed-on: http://git.am.freescale.net:8181/19008 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Xiaobo Xie <X.Xie@freescale.com> Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
2014-09-17t1040rdb: add slic tdm node to t1040rdbZhao Qiang
add slic tdm node into t1040rdb.dts Signed-off-by: Zhao Qiang <B45475@freescale.com> Change-Id: I1862ebef1b7bfd5a43258afbd62bcfe417dc61c0 Reviewed-on: http://git.am.freescale.net:8181/19000 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Xiaobo Xie <X.Xie@freescale.com> Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
2014-09-05T104xRDB/dts: add bqman node placeholder before fman to support ARZhang Zhuoyu
the device tree is walked in a bottom-up order to suspend devices. Callback sequence of devices is determinated by the first time it appears in device tree not where it is defined, thus add two placeholders of bqman before fman to make sure fman suspended before bqman. Signed-off-by: Zhang Zhuoyu <Zhuoyu.Zhang@freescale.com>
2014-08-07merge ENGR00300868Rich Schmitt
2014-08-06Revert "powerpc: Enable erratum A-008007 workaorund for T1040 Rev1.0"Priyanka Jain
This reverts commit 062853ac8f4b6fb5fee1770b67d4684023929e10. New PBI-based workaround which resets PVR register for erratum A-008007 is implemented in RCW. So no workaround implementation is required in Linux Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Change-Id: I6d952796efda066fd648179dd9508a0f8c4c2ba2 Reviewed-on: http://git.am.freescale.net:8181/15311 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Tested-by: Richard Schmitt <richard.schmitt@freescale.com> Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
2014-08-06powerpc/fsl-booke: Add initial T1042RDB board supportVijay Rai
T1042RDB is Freescale Reference Design Board supporting the T1042 QorIQ Power Architecture processor. T1042RDB board Overview ----------------------- - SERDES Connections, 8 lanes supporting: - PCI - SGMII - SATA 2.0 - DDR Controller - Supports rates of up to 1600 MHz data-rate - Supports one DDR3LP UDIMM - IFC/Local Bus - NAND flash: 1GB 8-bit NAND flash - NOR: 128MB 16-bit NOR Flash - Ethernet - Two on-board RGMII 10/100/1G ethernet ports. - PHY #0 remains powered up during deep-sleep - CPLD - Clocks - System and DDR clock (SYSCLK, DDRCLK) - SERDES clocks - Power Supplies - USB - Supports two USB 2.0 ports with integrated PHYs - Two type A ports with 5V@1.5A per port. - SDHC - SDHC/SDXC connector - SPI - On-board 64MB SPI flash - I2C - Devices connected: EEPROM, thermal monitor, VID controller - Other IO - Two Serial ports - ProfiBus port Add support for T1042 RDB board: -add device tree Signed-off-by: Vijay Rai <vijay.rai@freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Change-Id: I4dd5e168e4e6e62e10a362ec41b1edc33f988731 Reviewed-on: http://git.am.freescale.net:8181/15312 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
2014-07-21DSAR: added dsar dts for t1040 and t1042Eyal Harari
Signed-off-by: Eyal Harari <Eyal.Harari@freesacle.com>
2014-06-10powerpc/85xx: dts: enlarge kernel image patition in nor FlashYangbo Lu
Enlarge kernel image nor-patition for some P1/P2 boards that include p1020rdb-pd, p1021rdb-pc, p1022ds, p1025twr, and p2020rdb-pc. Signed-off-by: Xie Xiaobo <X.Xie@freescale.com> Signed-off-by: Lu Yangbo <yangbo.lu@freescale.com> Change-Id: I7306a062dfea47a6d8daf278c7f608cdab3b5684 Reviewed-on: http://git.am.freescale.net:8181/13437 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhenhua Luo <zhenhua.luo@freescale.com> Tested-by: Zhenhua Luo <zhenhua.luo@freescale.com>
2014-06-03t1040: fix scfg device tree node spelling errorLaurentiu Tudor
Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com> Change-Id: I87bcb0d65f2cc9a1ebc129290ad1284d2a1f8b18 Reviewed-on: http://git.am.freescale.net:8181/13000 Reviewed-by: Priyanka Jain <Priyanka.Jain@freescale.com> Reviewed-by: Thomas Trefny <Tom.Trefny@freescale.com> Tested-by: Richard Schmitt <richard.schmitt@freescale.com>
2014-06-03fmd: change chosen node dt files to support increased resourcesMandy Lavi
These dt files re-allocates the fman resources to the ports so that they are stretched close to the fman possible limit Change-Id: Ia803628186132db8e2969d8c252d869d2cbdb3a8 Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/13298 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Nir Erez <nir.erez@freescale.com> Reviewed-by: Thomas Trefny <Tom.Trefny@freescale.com>
2014-06-02t2080/usdpaa/dts: Change num Rx FQs to 3 for shared ethernetSandeep Singh
Signed-off-by: Sandeep Singh <sandeep@freescale.com> Change-Id: I143c1f42c3ed6b69dafce3f22dbc9640a48f667b Reviewed-on: http://git.am.freescale.net:8181/13083 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Vakul Garg <vakul@freescale.com> Reviewed-by: Thomas Trefny <Tom.Trefny@freescale.com>
2014-05-31powerpc/p1022: fix nand partitions cannot identifyWang Dongsheng
Nand partitions cannot idetify when PIXIS is indirect model. When DIU not enable, we need to keep the pixis is direct model. Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> Change-Id: I028ed60c3677e8d16d01e4bad0f3a4a393ab8ab4 Reviewed-on: http://git.am.freescale.net:8181/13035 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com> Reviewed-by: Scott Wood <scottwood@freescale.com> Reviewed-by: Zhenhua Luo <zhenhua.luo@freescale.com> Tested-by: Zhenhua Luo <zhenhua.luo@freescale.com>
2014-05-29c293/pci: remove hook pcibios_fixup_phbHou Zhiqiang
The c293pcie board is an endpoint device, and it does't need PM. Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Change-Id: I5d20c0a0f85ef8c7141d36f9f085515fa8055541 Reviewed-on: http://git.am.freescale.net:8181/13003 Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-05-29t2080/usdpaa/dts: Change num Tx FQs to 8 for shared ethernetVakul Garg
DPA eth driver for shared ethernet requires one Tx FQ for each core. Since T2080 has 8 cores, we change number of Tx FQs for shared ethernet to 8. Signed-off-by: Vakul Garg <vakul@freescale.com> Change-Id: Ie4b78e7fc71a8e0cbea0f04cf104478c27dbabcf Reviewed-on: http://git.am.freescale.net:8181/13041 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Sandeep Singh <sandeep@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-05-27powerpc/t1040/dts: Add SLIC nodes to t1040rdb device treeSandeep Singh
t1040rdb has two on-board SLIC devices. Signed-off-by: Sandeep Singh <sandeep@freescale.com> Change-Id: Ic26669b39ac2287cc89dfc88ed5500fbf5177f07 Reviewed-on: http://git.am.freescale.net:8181/12412 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-05-27powerpc/85xx: Add TDM device tree entry to T1040 platform.Sandeep Singh
Signed-off-by: Sandeep Singh <sandeep@freescale.com> Change-Id: I1866c9373f05c484bcb9ffeab3691c389ca5df58 Reviewed-on: http://git.am.freescale.net:8181/7231 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com> (cherry picked from commit 305cd35d3f9636d292dfaef6e6bdc885aaa43862) Reviewed-on: http://git.am.freescale.net:8181/12336
2014-05-27powerpc/85xx: Device tree entry for Freescale TDM controller.Sandeep Singh
Add device tree for TDM on QorIQ chips. Signed-off-by: Sandeep Singh <sandeep@freescale.com> Change-Id: Ia05e43d3e4ef265cc01489ab26fb8359c1ff55f2 Reviewed-on: http://git.am.freescale.net:8181/7230 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com> (cherry picked from commit 23a3ae0454a1560c3b9a5ff12465f5122184c9f2) Reviewed-on: http://git.am.freescale.net:8181/12335
2014-05-27powerpc/t2081qds/dts: fix missing dpaa node for t2081qdsShengzhou Liu
Add missing qoriq-dpaa-res3.dtsi and qoriq-qman-ceetm0.dtsi Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Change-Id: I7cdbb743340d0809e3fa11270ff0af63494a0f09 Reviewed-on: http://git.am.freescale.net:8181/12878 Reviewed-by: Xiaobo Xie <X.Xie@freescale.com> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-05-26powerpc/e6500: hw tablewalk: fix recursive tlb lock on cpu 0Scott Wood
Commit e2929e1e0ab910995090ce0714beab75618db694 "powerpc/e6500: Make TLB lock recursive" introduced a bug whereby cpu 0 uses the same value for "lock held" as is used to indicate that the lock is free. This means that cpu 1 can acquire the lock whenever it wants, regardless of whether cpu 0 has it locked, which in turn means we can get duplicate TLB entries. Add one to the CPU value to ensure we do not use zero as a "lock held" value. Signed-off-by: Scott Wood <scottwood@freescale.com> Change-Id: I8c8013adc2e153f19d780a3b202c993054feb47f Reviewed-on: http://git.am.freescale.net:8181/12823 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Mihai Claudiu Caraman <mihai.caraman@freescale.com> Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
2014-05-22powerpc/85xx/defconfig: enable CONFIG_RTC_DRV_DS1307Shengzhou Liu
By default we enable CONFIG_RTC_DRV_DS1307 to support DS1339 RTC on some boards. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Change-Id: Ic0370434e00ff4616b2ea563a0e3e8b99efa649a Reviewed-on: http://git.am.freescale.net:8181/12665 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-05-22t2080rdb/dts: update i2c and spi node for t2080rdbShengzhou Liu
- fix i2c nodes for pca9546, adt7481, rtc ds1339, eeprom. - remove incorrect sst25wf040 device node, only one Micron n25q512a on t2080rdb. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Change-Id: I4c0d6a549e5f7164ec14cb2e59468ca14df19317 Reviewed-on: http://git.am.freescale.net:8181/12663 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-05-22t2080qds/dts: update spi nodes for t2080qdsShengzhou Liu
- update SPI nodes to support 3 SPI devices: Micron n25q128a11, SST sst25wf040 and EON en25s64. - remove unnecessary spi partition nodes, which is replaced by mtdparts. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Change-Id: I20cf48f886507d5c31859d8a2e3491f4489bb518 Reviewed-on: http://git.am.freescale.net:8181/12662 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-05-21powerpc/e6500: hw tablewalk: clear TID in kernel indirect entriesScott Wood
Previously TID was being cleared before the tlbsx, but not after. This can lead to a multiway hit between a TLB entry with TID=0 (previously inserted when PID=0) and a TLB entry with TID!=0 that matches PID. This can theoretically result in undefined behavior, though we probably get lucky due to the details of the overlap. It also results in the inability to use multihit detection to detect other conflicting TLB entries, as well as poorer TLB utilization due to duplicating kernel TLB entries. Rather than try to patch up MAS1 after tlbsx, the entire value is saved/restored as with MAS2. I observed a slight improvement in TLB miss performance with this patch applied. Signed-off-by: Scott Wood <scottwood@freescale.com> Reported-by: Ed Swarthout <ed.swarthout@freescale.com> Change-Id: Ia756411e110c245781357a3b1985fade648d791a Reviewed-on: http://git.am.freescale.net:8181/12509 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Edward L Swarthout <ed.swarthout@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-05-21powerpc/85xx: p1025twr: add module conditional to fix QE-uart issueXie Xiaobo
A ioport setting was needed when used the QE uart function on TWR-P1025. Added a conditional definition to avoid missing this setting when the QE-uart driver was bulit to a module. Signed-off-by: Xie Xiaobo <X.Xie@freescale.com> Change-Id: I95b40c760335ce5fa7a27a94287dbef28219b5fa Reviewed-on: http://git.am.freescale.net:8181/6643 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Yang Li <LeoLi@freescale.com> Reviewed-by: Thomas Trefny <Tom.Trefny@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/12045 Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-05-19powerpc: Enable erratum A-008007 workaorund for T1040 Rev1.0Priyanka Jain
Erratum A-008007 states that PVR register value is unreliable for e5500 cores (Major revision 1.0, Minor revision 2.0) which are present in T1040 Rev1.0 SoC. This workaround implementation -adds a new config option 'CONFIG_FSL_ERRATUM_A_008007' in t1040 specific defconfig files. This config option is used to make sure that changes does not impact non-T1040 platforms. -replaces mfspr(x) macro defintion to check if above erratum is defined and if x is same as SPRN_PVR, then return static value else call mfspr instruction. -Similarly replaces mfpvr() calls TODO: 1.Use some cleaner approach like reading SVR rgeister or parse device tree to check if T1040 Rev1.0 Si instead of using config option. 2.This patch only replaces current accesses of PVR register but does not restrict any new code which tries to read this. A mechanism needs to be implemented to restrict this. Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Change-Id: Ib5f17dec01ca0d98c5f506b1be23dfe06a541015 Reviewed-on: http://git.am.freescale.net:8181/12350 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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