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2014-12-11t1024/dts: add usdpaa and capwap device treeShengzhou Liu
- Add usdpaa device tree for t1024qds and t1024rdb. - Add default capwap dts for t1024qds and t1024rdb. Signed-off-by: Vakul Garg <vakul@freescale.com> Signed-off-by: Pan Jiafei <Jiafei.Pan@freescale.com> Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Change-Id: Ic9da808112675f0c1db67307c96461b0b69f7260 Reviewed-on: http://git.am.freescale.net:8181/21427 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
2014-12-11powerpc/t1024: some update for t1024Shengzhou Liu
- enable mixed mode of MPIC for deep sleep - add deep sleep support for t1024 - add SDXC support for T1024QDS - add TDM node in dts for Maxim DS26522 Riser card. Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> Signed-off-by: Xie Xiaobo <X.Xie@freescale.com> Signed-off-by: Zhao Qiang <B45475@freescale.com> Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Change-Id: I9cb45b4a02814a4f4cd0a320510361c424545d44 Reviewed-on: http://git.am.freescale.net:8181/21426 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
2014-12-11fmd: extend workaround of fman reset for T1024Shengzhou Liu
The same hang issue was observed on T1024 as well. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Change-Id: Ifad3fff1b430be90b6cc9548a959365ecd28236d Reviewed-on: http://git.am.freescale.net:8181/21425 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Xiaobo Xie <X.Xie@freescale.com>
2014-12-11deepsleep: add a common cpld compatible for deepsleepWang Dongsheng
use the common compatible "fsl,deepsleep-cpld" for deepsleep on multiple boards. Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> Change-Id: I7efc5292421376d4ca62a4f1489ce7fb9258097d Reviewed-on: http://git.am.freescale.net:8181/21424 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Xiaobo Xie <X.Xie@freescale.com> Reviewed-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
2014-12-11fsl/diu: enable diu support for t1024QDS boardWang Dongsheng
This patch add the DIU platform support for T1024QDS board. The hdmi port is verified on the board. Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> Change-Id: Iaf3c9d7a65a7abb7f96a0be863587aecc5ec4279 Reviewed-on: http://git.am.freescale.net:8181/21423 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Xiaobo Xie <X.Xie@freescale.com> Reviewed-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
2014-12-11powerpc/fsl-booke: Add T1024RDB board supportShengzhou Liu
T1024RDB is a Freescale Reference Design Board that hosts the T1024 SoC. T1024RDB board Overview ----------------------- - Processor: T1024 SoC integrating two 64-bit e5500 cores up to 1.4GHz - DDR: 64-bit 4GB DDR3L UDIMM with ECC and interleaving support - Ethernet: two 10M/100M/1Gbps RGMII ports and one 10Gbps Base-T port on-board - Accelerator: DPAA components consist of FMan, BMan, QMan, PME, DCE and SEC - SerDes: 4 lanes up to 10.3125GHz - IFC: 128MB NOR Flash, 1GB NAND Flash and CPLD system controlling - PCIe: one PCIe slot and two Mini-PCIe connectors on-board - USB: two Type-A USB2.0 ports with internal PHY - eSDHC: one SDHC/MMC/eMMC connector - eSPI: one 64MB N25Q512 SPI flash - QE-TDM: support TDM Riser card - 32-bit RISC controller for flexible support of the communications peripherals - Serial DMA channel for receive and transmit on all serial channels - Two universal communication controllers, supporting TDM, HDLC, and UART - I2C: four I2C controllers - UART: two UART on board - Deep sleep power management implementaion Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Change-Id: Ie933ad91dc0f214f84c40259f99bc6b0b927be87 Reviewed-on: http://git.am.freescale.net:8181/21422 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Xiaobo Xie <X.Xie@freescale.com>
2014-12-11powerpc/fsl-booke: Add T102x QDS board supportShengzhou Liu
Add support for Freescale T1024/T1023 QorIQ Development System Board. T1024QDS is a high-performance computing evaluation, development and test platform for T1024 QorIQ Power Architecture processor. T1024QDS board Overview ----------------------- - T1024 SoC integrating two 64-bit e5500 cores up to 1.4GHz - CoreNet fabric supporting coherent and noncoherent transactions with prioritization and bandwidth allocation - 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving support - Accelerator: DPAA components consist of FMan, BMan, QMan, PME, DCE and SEC - Ethernet interfaces: - Two 10M/100M/1G RGMII ports on-board - Three 1G/2.5Gbps SGMII ports - Four 1Gbps QSGMII ports - one 10Gbps XFI or 10G Base-KR interface - SerDes: 4 lanes up to 10.3125GHz Supporting SGMII/QSGMII, XFI, PCIe, SATA and Aurora - PCIe: Three PCI Express controllers with five PCIe slots. - IFC: 128MB NOR Flash, 2GB NAND Flash, PromJet debug port and Qixis FPGA - Video: DIU supports video up to 1280x1024x32 bpp. - Chrontel CH7201 for HDMI connection. - TI DS90C387R for direct LCD connection. - Raw (not encoded) video connector for testing or other encoders. - QUICC Engine block - 32-bit RISC controller for flexible support of the communications peripherals - Serial DMA channel for receive and transmit on all serial channels - Two universal communication controllers, supporting TDM, HDLC, and UART - Deep sleep power management implementaion (wakeup from GPIO/Timer/Ethernet/USB) - eSPI: Three SPI flash devices. - SATA: one SATA 2.O. - USB: Two USB2.0 ports with internal PHY (one Type-A and one micro Type mini-AB) - eSDHC: Support SD, SDHC, SDXC and MMC/eMMC. - I2C: Four I2C controllers. - UART: Two UART on board. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Change-Id: I8d4f93e21c2f6d76fa09144994e9724596a3a601 Reviewed-on: http://git.am.freescale.net:8181/21421 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Xiaobo Xie <X.Xie@freescale.com>
2014-12-11powerpc/fsl-booke: Add device tree support for T1024/T1023 SoCShengzhou Liu
The T1024 SoC includes the following function and features: - Two 64-bit Power architecture e5500 cores, up to 1.4GHz - private 256KB L2 cache each core and shared 256KB CoreNet platform cache (CPC) - 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving support - Data Path Acceleration Architecture (DPAA) incorporating acceleration - Four MAC for 1G/2.5G/10G network interfaces (RGMII, SGMII, QSGMII, XFI) - High-speed peripheral interfaces - Three PCI Express 2.0 controllers - Additional peripheral interfaces - One SATA 2.0 controller - Two USB 2.0 controllers with integrated PHY - Enhanced secure digital host controller (SD/eSDHC/eMMC) - Enhanced serial peripheral interface (eSPI) - Four I2C controllers - Four 2-pin UARTs or two 4-pin UARTs - Integrated Flash Controller supporting NAND and NOR flash - Two 8-channel DMA engines - Multicore programmable interrupt controller (PIC) - LCD interface (DIU) with 12 bit dual data rate - QUICC Engine block supporting TDM, HDLC, and UART - Deep Sleep power implementaion (wakeup from GPIO/Timer/Ethernet/USB) - Support for hardware virtualization and partitioning enforcement - QorIQ Platform's Trust Architecture 2.0 Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Change-Id: If6cc23503c20f25f1ae2d59d64e06bee2be85753 Reviewed-on: http://git.am.freescale.net:8181/21420 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Xiaobo Xie <X.Xie@freescale.com>
2014-12-11powerpc/defconfig/fsl: rename t1040_xxbit_smp_defconfig to ↵Shengzhou Liu
corenetxx_fmanv3_smp_defconfig T1024 and T1040 use the same defconfig(Corenet platform with FMan_v3 enabled). - rename t1040_32bit_smp_defconfig to corenet32_fmanv3_smp_defconfig - rename t1040_64bit_smp_defconfig to corenet64_fmanv3_smp_defconfig Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Change-Id: Ic6a7588b4e1233c9a41fcc84e3824dd7e9965152 Reviewed-on: http://git.am.freescale.net:8181/21415 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Xiaobo Xie <X.Xie@freescale.com>
2014-12-11powerpc/e6500: Work around erratum A-008139Scott Wood
Erratum A-008139 can cause duplicate TLB entries if an indirect entry is overwritten using tlbwe while the other thread is using it to do a lookup. Work around this by using tlbilx to invalidate prior to overwriting. To avoid the need to save another register to hold MAS1 during the workaround code, TID clearing has been moved from tlb_miss_kernel_e6500 until after the SMT section. Signed-off-by: Scott Wood <scottwood@freescale.com> (cherry picked from commit 48cd9b5d590aee1664170968a9eae068e36761eb) Change-Id: I34cc02219f9081dbf8ff7729677a995b7a8bb4c5 Reviewed-on: http://git.am.freescale.net:8181/19463 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Scott Wood <scottwood@freescale.com> Reviewed-by: Mihai Caraman <mihai.caraman@freescale.com> Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
2014-10-19fmd: add new dtsi file for fmanV3LMandy Lavi
Change-Id: I65f6c770784cdf4ff8e5a16283597aec86daee56 Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/17428 Reviewed-by: Igal Liberman <Igal.Liberman@freescale.com> Reviewed-by: Mandy Lavi <Mandy.Lavi@freescale.com> Tested-by: Mandy Lavi <Mandy.Lavi@freescale.com>
2014-09-17qe-tdm: move siram_init_flag to qe.cZhao Qiang
Signed-off-by: Zhao Qiang <B45475@freescale.com> Change-Id: Id21f861ffec995ad68378a9d2eda245ef989b489 Reviewed-on: http://git.am.freescale.net:8181/19009 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Xiaobo Xie <X.Xie@freescale.com> Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
2014-09-17qe-hdlc: qe-hdlc work in normal mode instead of internal-loopback modeZhao Qiang
qe-hdlc worked in internal-loopback without TDMR ds26522, now it can work with TDMR ds26522 in normal mode, so modify it to normal mode. Signed-off-by: Zhao Qiang <B45475@freescale.com> Change-Id: I7eeb4ec196d74cb53f3bffced0889637c72ed5d6 Reviewed-on: http://git.am.freescale.net:8181/19008 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Xiaobo Xie <X.Xie@freescale.com> Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
2014-09-17t1040rdb: add slic tdm node to t1040rdbZhao Qiang
add slic tdm node into t1040rdb.dts Signed-off-by: Zhao Qiang <B45475@freescale.com> Change-Id: I1862ebef1b7bfd5a43258afbd62bcfe417dc61c0 Reviewed-on: http://git.am.freescale.net:8181/19000 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Xiaobo Xie <X.Xie@freescale.com> Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
2014-09-05T104xRDB/dts: add bqman node placeholder before fman to support ARZhang Zhuoyu
the device tree is walked in a bottom-up order to suspend devices. Callback sequence of devices is determinated by the first time it appears in device tree not where it is defined, thus add two placeholders of bqman before fman to make sure fman suspended before bqman. Signed-off-by: Zhang Zhuoyu <Zhuoyu.Zhang@freescale.com>
2014-08-07merge ENGR00300868Rich Schmitt
2014-08-06Revert "powerpc: Enable erratum A-008007 workaorund for T1040 Rev1.0"Priyanka Jain
This reverts commit 062853ac8f4b6fb5fee1770b67d4684023929e10. New PBI-based workaround which resets PVR register for erratum A-008007 is implemented in RCW. So no workaround implementation is required in Linux Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Change-Id: I6d952796efda066fd648179dd9508a0f8c4c2ba2 Reviewed-on: http://git.am.freescale.net:8181/15311 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Tested-by: Richard Schmitt <richard.schmitt@freescale.com> Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
2014-08-06powerpc/fsl-booke: Add initial T1042RDB board supportVijay Rai
T1042RDB is Freescale Reference Design Board supporting the T1042 QorIQ Power Architecture processor. T1042RDB board Overview ----------------------- - SERDES Connections, 8 lanes supporting: - PCI - SGMII - SATA 2.0 - DDR Controller - Supports rates of up to 1600 MHz data-rate - Supports one DDR3LP UDIMM - IFC/Local Bus - NAND flash: 1GB 8-bit NAND flash - NOR: 128MB 16-bit NOR Flash - Ethernet - Two on-board RGMII 10/100/1G ethernet ports. - PHY #0 remains powered up during deep-sleep - CPLD - Clocks - System and DDR clock (SYSCLK, DDRCLK) - SERDES clocks - Power Supplies - USB - Supports two USB 2.0 ports with integrated PHYs - Two type A ports with 5V@1.5A per port. - SDHC - SDHC/SDXC connector - SPI - On-board 64MB SPI flash - I2C - Devices connected: EEPROM, thermal monitor, VID controller - Other IO - Two Serial ports - ProfiBus port Add support for T1042 RDB board: -add device tree Signed-off-by: Vijay Rai <vijay.rai@freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Change-Id: I4dd5e168e4e6e62e10a362ec41b1edc33f988731 Reviewed-on: http://git.am.freescale.net:8181/15312 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
2014-07-21DSAR: added dsar dts for t1040 and t1042Eyal Harari
Signed-off-by: Eyal Harari <Eyal.Harari@freesacle.com>
2014-06-10powerpc/85xx: dts: enlarge kernel image patition in nor FlashYangbo Lu
Enlarge kernel image nor-patition for some P1/P2 boards that include p1020rdb-pd, p1021rdb-pc, p1022ds, p1025twr, and p2020rdb-pc. Signed-off-by: Xie Xiaobo <X.Xie@freescale.com> Signed-off-by: Lu Yangbo <yangbo.lu@freescale.com> Change-Id: I7306a062dfea47a6d8daf278c7f608cdab3b5684 Reviewed-on: http://git.am.freescale.net:8181/13437 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhenhua Luo <zhenhua.luo@freescale.com> Tested-by: Zhenhua Luo <zhenhua.luo@freescale.com>
2014-06-03t1040: fix scfg device tree node spelling errorLaurentiu Tudor
Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com> Change-Id: I87bcb0d65f2cc9a1ebc129290ad1284d2a1f8b18 Reviewed-on: http://git.am.freescale.net:8181/13000 Reviewed-by: Priyanka Jain <Priyanka.Jain@freescale.com> Reviewed-by: Thomas Trefny <Tom.Trefny@freescale.com> Tested-by: Richard Schmitt <richard.schmitt@freescale.com>
2014-06-03fmd: change chosen node dt files to support increased resourcesMandy Lavi
These dt files re-allocates the fman resources to the ports so that they are stretched close to the fman possible limit Change-Id: Ia803628186132db8e2969d8c252d869d2cbdb3a8 Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/13298 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Nir Erez <nir.erez@freescale.com> Reviewed-by: Thomas Trefny <Tom.Trefny@freescale.com>
2014-06-02t2080/usdpaa/dts: Change num Rx FQs to 3 for shared ethernetSandeep Singh
Signed-off-by: Sandeep Singh <sandeep@freescale.com> Change-Id: I143c1f42c3ed6b69dafce3f22dbc9640a48f667b Reviewed-on: http://git.am.freescale.net:8181/13083 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Vakul Garg <vakul@freescale.com> Reviewed-by: Thomas Trefny <Tom.Trefny@freescale.com>
2014-05-31powerpc/p1022: fix nand partitions cannot identifyWang Dongsheng
Nand partitions cannot idetify when PIXIS is indirect model. When DIU not enable, we need to keep the pixis is direct model. Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> Change-Id: I028ed60c3677e8d16d01e4bad0f3a4a393ab8ab4 Reviewed-on: http://git.am.freescale.net:8181/13035 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com> Reviewed-by: Scott Wood <scottwood@freescale.com> Reviewed-by: Zhenhua Luo <zhenhua.luo@freescale.com> Tested-by: Zhenhua Luo <zhenhua.luo@freescale.com>
2014-05-29c293/pci: remove hook pcibios_fixup_phbHou Zhiqiang
The c293pcie board is an endpoint device, and it does't need PM. Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Change-Id: I5d20c0a0f85ef8c7141d36f9f085515fa8055541 Reviewed-on: http://git.am.freescale.net:8181/13003 Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-05-29t2080/usdpaa/dts: Change num Tx FQs to 8 for shared ethernetVakul Garg
DPA eth driver for shared ethernet requires one Tx FQ for each core. Since T2080 has 8 cores, we change number of Tx FQs for shared ethernet to 8. Signed-off-by: Vakul Garg <vakul@freescale.com> Change-Id: Ie4b78e7fc71a8e0cbea0f04cf104478c27dbabcf Reviewed-on: http://git.am.freescale.net:8181/13041 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Sandeep Singh <sandeep@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-05-27powerpc/t1040/dts: Add SLIC nodes to t1040rdb device treeSandeep Singh
t1040rdb has two on-board SLIC devices. Signed-off-by: Sandeep Singh <sandeep@freescale.com> Change-Id: Ic26669b39ac2287cc89dfc88ed5500fbf5177f07 Reviewed-on: http://git.am.freescale.net:8181/12412 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-05-27powerpc/85xx: Add TDM device tree entry to T1040 platform.Sandeep Singh
Signed-off-by: Sandeep Singh <sandeep@freescale.com> Change-Id: I1866c9373f05c484bcb9ffeab3691c389ca5df58 Reviewed-on: http://git.am.freescale.net:8181/7231 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com> (cherry picked from commit 305cd35d3f9636d292dfaef6e6bdc885aaa43862) Reviewed-on: http://git.am.freescale.net:8181/12336
2014-05-27powerpc/85xx: Device tree entry for Freescale TDM controller.Sandeep Singh
Add device tree for TDM on QorIQ chips. Signed-off-by: Sandeep Singh <sandeep@freescale.com> Change-Id: Ia05e43d3e4ef265cc01489ab26fb8359c1ff55f2 Reviewed-on: http://git.am.freescale.net:8181/7230 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com> (cherry picked from commit 23a3ae0454a1560c3b9a5ff12465f5122184c9f2) Reviewed-on: http://git.am.freescale.net:8181/12335
2014-05-27powerpc/t2081qds/dts: fix missing dpaa node for t2081qdsShengzhou Liu
Add missing qoriq-dpaa-res3.dtsi and qoriq-qman-ceetm0.dtsi Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Change-Id: I7cdbb743340d0809e3fa11270ff0af63494a0f09 Reviewed-on: http://git.am.freescale.net:8181/12878 Reviewed-by: Xiaobo Xie <X.Xie@freescale.com> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-05-26powerpc/e6500: hw tablewalk: fix recursive tlb lock on cpu 0Scott Wood
Commit e2929e1e0ab910995090ce0714beab75618db694 "powerpc/e6500: Make TLB lock recursive" introduced a bug whereby cpu 0 uses the same value for "lock held" as is used to indicate that the lock is free. This means that cpu 1 can acquire the lock whenever it wants, regardless of whether cpu 0 has it locked, which in turn means we can get duplicate TLB entries. Add one to the CPU value to ensure we do not use zero as a "lock held" value. Signed-off-by: Scott Wood <scottwood@freescale.com> Change-Id: I8c8013adc2e153f19d780a3b202c993054feb47f Reviewed-on: http://git.am.freescale.net:8181/12823 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Mihai Claudiu Caraman <mihai.caraman@freescale.com> Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
2014-05-22powerpc/85xx/defconfig: enable CONFIG_RTC_DRV_DS1307Shengzhou Liu
By default we enable CONFIG_RTC_DRV_DS1307 to support DS1339 RTC on some boards. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Change-Id: Ic0370434e00ff4616b2ea563a0e3e8b99efa649a Reviewed-on: http://git.am.freescale.net:8181/12665 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-05-22t2080rdb/dts: update i2c and spi node for t2080rdbShengzhou Liu
- fix i2c nodes for pca9546, adt7481, rtc ds1339, eeprom. - remove incorrect sst25wf040 device node, only one Micron n25q512a on t2080rdb. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Change-Id: I4c0d6a549e5f7164ec14cb2e59468ca14df19317 Reviewed-on: http://git.am.freescale.net:8181/12663 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-05-22t2080qds/dts: update spi nodes for t2080qdsShengzhou Liu
- update SPI nodes to support 3 SPI devices: Micron n25q128a11, SST sst25wf040 and EON en25s64. - remove unnecessary spi partition nodes, which is replaced by mtdparts. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Change-Id: I20cf48f886507d5c31859d8a2e3491f4489bb518 Reviewed-on: http://git.am.freescale.net:8181/12662 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-05-21powerpc/e6500: hw tablewalk: clear TID in kernel indirect entriesScott Wood
Previously TID was being cleared before the tlbsx, but not after. This can lead to a multiway hit between a TLB entry with TID=0 (previously inserted when PID=0) and a TLB entry with TID!=0 that matches PID. This can theoretically result in undefined behavior, though we probably get lucky due to the details of the overlap. It also results in the inability to use multihit detection to detect other conflicting TLB entries, as well as poorer TLB utilization due to duplicating kernel TLB entries. Rather than try to patch up MAS1 after tlbsx, the entire value is saved/restored as with MAS2. I observed a slight improvement in TLB miss performance with this patch applied. Signed-off-by: Scott Wood <scottwood@freescale.com> Reported-by: Ed Swarthout <ed.swarthout@freescale.com> Change-Id: Ia756411e110c245781357a3b1985fade648d791a Reviewed-on: http://git.am.freescale.net:8181/12509 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Edward L Swarthout <ed.swarthout@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-05-21powerpc/85xx: p1025twr: add module conditional to fix QE-uart issueXie Xiaobo
A ioport setting was needed when used the QE uart function on TWR-P1025. Added a conditional definition to avoid missing this setting when the QE-uart driver was bulit to a module. Signed-off-by: Xie Xiaobo <X.Xie@freescale.com> Change-Id: I95b40c760335ce5fa7a27a94287dbef28219b5fa Reviewed-on: http://git.am.freescale.net:8181/6643 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Yang Li <LeoLi@freescale.com> Reviewed-by: Thomas Trefny <Tom.Trefny@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/12045 Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-05-19powerpc: Enable erratum A-008007 workaorund for T1040 Rev1.0Priyanka Jain
Erratum A-008007 states that PVR register value is unreliable for e5500 cores (Major revision 1.0, Minor revision 2.0) which are present in T1040 Rev1.0 SoC. This workaround implementation -adds a new config option 'CONFIG_FSL_ERRATUM_A_008007' in t1040 specific defconfig files. This config option is used to make sure that changes does not impact non-T1040 platforms. -replaces mfspr(x) macro defintion to check if above erratum is defined and if x is same as SPRN_PVR, then return static value else call mfspr instruction. -Similarly replaces mfpvr() calls TODO: 1.Use some cleaner approach like reading SVR rgeister or parse device tree to check if T1040 Rev1.0 Si instead of using config option. 2.This patch only replaces current accesses of PVR register but does not restrict any new code which tries to read this. A mechanism needs to be implemented to restrict this. Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Change-Id: Ib5f17dec01ca0d98c5f506b1be23dfe06a541015 Reviewed-on: http://git.am.freescale.net:8181/12350 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-05-16powerpc/dts: Add 1588 timer node for bsc9131rdbYangbo Lu
Add 1588 timer node in file: arch/powerpc/boot/dts/fsl/bsc9131si-post.dtsi Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com> Change-Id: I1dbbcab7ed38d136d3d8bd589adbf5e451db612c Reviewed-on: http://git.am.freescale.net:8181/12433 Reviewed-by: Xiaobo Xie <X.Xie@freescale.com> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-05-16fmd: fmanv1 dt chosen node to change fifo-sizeMandy Lavi
Change-Id: I8acfcfe0da35031c20b55a67626f0fbe13a42246 Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/12367 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Nir Erez <nir.erez@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-05-14Merge remote-tracking branch 'stable/linux-3.12.y' into sdk-v1.6.xScott Wood
Signed-off-by: Scott Wood <scottwood@freescale.com> Conflicts: arch/sparc/Kconfig drivers/tty/tty_buffer.c
2014-05-14booke/powerpc: define wimge shift mask to fix compilation errorBharat Bhushan
This fixes below compilation error on SOCs where CONFIG_PHYS_64BIT is not defined: arch/powerpc/kvm/e500_mmu_host.c: In function 'kvmppc_e500_shadow_map': | arch/powerpc/kvm/e500_mmu_host.c:631:20: error: 'PTE_WIMGE_SHIFT' undeclared (first use in this function) | wimg = (*ptep >> PTE_WIMGE_SHIFT) & MAS2_WIMGE_MASK; | ^ | arch/powerpc/kvm/e500_mmu_host.c:631:20: note: each undeclared identifier is reported only once for each function it appears in | make[1]: *** [arch/powerpc/kvm/e500_mmu_host.o] Error 1 Signed-off-by: Bharat Bhushan <Bharat.Bhushan@freescale.com> Change-Id: Ic49cf6dab73f05b7eed751c2fa6bc6182f178cdc Reviewed-on: http://git.am.freescale.net:8181/12214 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Stuart Yoder <stuart.yoder@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-05-14powerpc/pm: add API for setting powerdown exceptionZhao Chenhui
Add fsl_set_power_except() for setting powerdown exception when sleep. The drivers can call this function to set the corresponding bits if the devices will power down when sleep. This patch also fixed an issue which is that FMan ports can not work after wake-up from deep sleep using Wake-on-LAN. Set FMan bit and MAC bits of the register IPPDEXPCR seperately, instead of setting them together. Change-Id: I8f632efb8ca54a5d32deb7ee1d42b333fa66d5cd Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/12219 Reviewed-by: Yang Li <LeoLi@freescale.com> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-05-13powerpc/t1040/dts: Chang oh5 to oh2Jianhua Xie
According to T1040RM Rev D, 04/2014, T1 has not as many FM_MAX_NUM_OF_OH_PORTS as the ones in T4240, there are only 4 Offline/Host Command Ports (O/H n) in T1. So oh5 is not available. This patch is replacing oh5 with oh2 in T1 dts. Signed-off-by: Jianhua Xie <jianhua.xie@freescale.com> Change-Id: I99be60539aad6d9999dd8198fd5b0e98ecef7ca0 Reviewed-on: http://git.am.freescale.net:8181/12242 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Mandy Lavi <Mandy.Lavi@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-05-13powerpc: T208xqds: Add ina220 nodes in dtsTang Yuantian
Add power sensor chip ina220 nodes in dts to support power monitor Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Change-Id: I7973e6c259f7189d077c798ca914bb4bf6d7dd98 Reviewed-on: http://git.am.freescale.net:8181/12206 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Hongtao Jia <hongtao.jia@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-05-12powerpc: T4240: Add ina220 node in dtsTang Yuantian
Add power sensor chip ina220 node in dts to support power monitor Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Change-Id: I2e250ad72ddc0cf226aabff515b9b0e4e72b3ff6 Reviewed-on: http://git.am.freescale.net:8181/12205 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Hongtao Jia <hongtao.jia@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-05-12booke/watchdog: refine and clean up the codesTang Yuantian
Basically, this patch does the following: 1. Move the codes of parsing boot parameters from setup-common.c to driver. In this way, code reader can know directly that there are boot parameters that can change the timeout. 2. Make boot parameter 'booke_wdt_period' effective. currently, when driver is loaded, default timeout is always being used in stead of booke_wdt_period. 3. Wrap up the watchdog timeout in device struct and clean up unnecessary codes. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Change-Id: I1d605067e39e3805a539f079e86934b38fa7d224 Reviewed-on: http://git.am.freescale.net:8181/12196 Reviewed-by: Yang Li <LeoLi@freescale.com> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-05-12powerpc/e6500rev2_defconfig: enable CONFIG_I2C_MUX and CONFIG_I2C_MUX_PCA954xShengzhou Liu
By default we enable CONFIG_I2C_MUX and CONFIG_I2C_MUX_PCA954x, which are needed on T2080QDS, T4240QDS, B4860QDS. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Change-Id: Ic897fb8d0cd2f06fe110d2d73f021fb8a1168aaf Reviewed-on: http://git.am.freescale.net:8181/12213 Reviewed-by: Shaohui Xie <Shaohui.Xie@freescale.com> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-05-09powerpc/booke64: wrap tlb lock and search in htw miss with FTR_SMTLaurentiu Tudor
Virtualized environments expose a e6500 dual-threaded core as two single-threaded e6500 cores. Take advantage of this and get rid of the tlb lock and the trap-causing tlbsx in the htw miss handler by guarding with CPU_FTR_SMT, as it's already being done in the bolted tlb1 miss handler. As results below show, lmbench random memory access latency test shows an improvement of ~34%. Memory latencies in nanoseconds - smaller is better (WARNING - may not be correct, check graphs) ---------------------------------------------------- Host Mhz L1 $ L2 $ Main mem Rand mem --------- --- ---- ---- -------- -------- smt 1665 1.8020 13.2 83.0 1149.7 nosmt 1665 1.8020 13.2 83.0 758.1 Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Change-Id: Ia6c028b8bb9c847d46d32f788a7257527cd6af09 Reviewed-on: http://git.am.freescale.net:8181/12089 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Scott Wood <scottwood@freescale.com> Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
2014-05-09hibernation/pci: fix PCI-EP device bar lost in hibernation thaw flowWang Dongsheng
EP device bar address will lost when EP device in D3 state, But when system thaw out from hibernation freezen, EP bar address not be restored in thaw flow. The pci framework provide arch-specific hooks(pcibios_pm_ops) when a PCI device is doing a hibernate transition, so register fsl_pci_thaw_noirq into pcibios_pm_ops to fix this issue, the fsl_pci_thaw_noirq will call pci_restore_state() to restore EP bar address. Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> Change-Id: I11b68737dd9aafc99f4b7571558529c37e8a648b Reviewed-on: http://git.am.freescale.net:8181/12031 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Yang Li <LeoLi@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-05-09t4240/dts: Enable third elo3 DMA engine supportChunhe Lan
T4240QDS and T4240RDB have the third DMA engine controller. So add corresponding DMA node into dts file. Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Change-Id: I52a1a7786ce7c8b457d4c1c532a6d50b28c08544 Reviewed-on: http://git.am.freescale.net:8181/12078 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
generated by cgit v0.10.2 at 2024-08-28 11:15:33 (GMT)