Age | Commit message (Expand) | Author |
2013-07-05 | drm/nvf0/gr: fix ddx shaders locking up on me | Ben Skeggs |
2013-07-05 | drm/nvc0/devinit: minor typo | Ben Skeggs |
2013-07-05 | drm/nvf0/gr: enable support, if external cs ucode is available | Ben Skeggs |
2013-07-05 | drm/nvf0/gr: magic sequence that makes PGRAPH come out of hiding | Ben Skeggs |
2013-07-05 | drm/nvf0/ce: enable support | Ben Skeggs |
2013-07-05 | drm/nvf0/fifo: enable support | Ben Skeggs |
2013-07-05 | drm/nvd7/gr: initial support | Maarten Lankhorst |
2013-07-05 | drm/nvc0-/gr: generate cs register lists from grctx data | Ben Skeggs |
2013-07-05 | drm/nvc0-/gr: tpc regs a subset of gpc, add separate list for gpc/unk regs | Ben Skeggs |
2013-07-05 | drm/nve0-/gr: some new gpc registers can have multiple copies | Ben Skeggs |
2013-07-05 | drm/nvc0-/gr: pull out a group of separately context-switched gpc regs | Ben Skeggs |
2013-07-05 | drm/nvc0-/gr: make register lists from initvals functions | Ben Skeggs |
2013-07-01 | drm/nvd0-/disp: handle case where display engine is missing/disabled | Maarten Lankhorst |
2013-07-01 | drm/gr/nvc0-: merge nvc0/nve0 ucode, and use cpp instead of m4 | Ben Skeggs |
2013-07-01 | drm/nouveau/bsp/nv84: initial vp2 engine implementation | Ilia Mirkin |
2013-07-01 | drm/nouveau/vp/nv84: initial vp2 engine implementation | Ilia Mirkin |
2013-07-01 | drm/nouveau/core: xtensa engine base class implementation | Ilia Mirkin |
2013-07-01 | drm/nouveau/vdec: fork vp3 implementations from vp2 | Ilia Mirkin |
2013-07-01 | drm/nouveau/core: move falcon class to engine/ | Ben Skeggs |
2013-07-01 | drm/nouveau/vm: perform a bar flush when flushing vm | Maarten Lankhorst |
2013-07-01 | drm/nvc0/gr: cleanup register lists, and add nvce/nvcf to switches | Ben Skeggs |
2013-07-01 | drm/nvc8/gr: update initial register/context values | Ben Skeggs |
2013-07-01 | drm/nvc4/gr: update initial register/context values | Ben Skeggs |
2013-07-01 | drm/nvc1/gr: update initial register/context values | Ben Skeggs |
2013-07-01 | drm/nvc3/gr: update initial register/context values | Ben Skeggs |
2013-07-01 | drm/nvc0/gr: update initial register/context values | Ben Skeggs |
2013-07-01 | drm/nvd9/gr: update initial register/context values | Ben Skeggs |
2013-07-01 | drm/nve4/gr: update initial register/context values | Ben Skeggs |
2013-07-01 | drm/nvc0-/gr: bump maximum gpc/tpc limits | Ben Skeggs |
2013-07-01 | drm/nvf0/gr: initial register/context setup | Ben Skeggs |
2013-07-01 | drm/nve7/gr: update initial register/context values | Ben Skeggs |
2013-07-01 | drm/nve6/gr: update initial register/context values | Ben Skeggs |
2013-07-01 | drm/nouveau/vm: make each vma take a reference on its parent vm | Ben Skeggs |
2013-07-01 | drm/nouveau/core: remove nouveau_mm.mutex, no more users | Ben Skeggs |
2013-07-01 | drm/nouveau/vm: take subdev mutex, not the mm, protects against race with vm/... | Ben Skeggs |
2013-07-01 | drm/nvc0/vm: handle bar tlb flushes internally | Ben Skeggs |
2013-07-01 | drm/nv50-/vm: take mutex rather than irqsave spinlock | Ben Skeggs |
2013-07-01 | drm/nv50/vm: remove explicit vm knowledge from engines | Ben Skeggs |
2013-07-01 | drm/nv50/vm: handle bar tlb flushes internally | Ben Skeggs |
2013-07-01 | drm/nvc0/gr: port mp trap handling from calim's kepler code | Ben Skeggs |
2013-07-01 | drm/nve0/gr: attempt to resume after sm traps | Ben Skeggs |
2013-07-01 | drm/nve0/gr: s/tp/tpc/ | Ben Skeggs |
2013-07-01 | drm/nve0/fifo: create our playlists up-front, at startup | Ben Skeggs |
2013-07-01 | drm/nva3/clk: minor improvements to fractional N calculation | Ben Skeggs |
2013-07-01 | drm/nouveau/fb: initialise vram controller as pfb sub-object | Ben Skeggs |
2013-07-01 | drm/nouveau/clk: change init ordering, no longer needed by devinit | Ben Skeggs |
2013-07-01 | drm/nouveau/devinit: move simple pll setting routines to devinit | Ben Skeggs |
2013-07-01 | drm/nouveau: pass generic subdev to calculation routines | Ben Skeggs |
2013-07-01 | drm/nve0/ce: stub interrupt handler | Ben Skeggs |
2013-07-01 | drm/nve0/ce: link ce2 to its engine, rather than from graphics | Ben Skeggs |