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path: root/drivers/sh/clk/cpg.c
AgeCommit message (Expand)Author
2012-11-13sh: clkfwk: fixup unsed variable warningKuninori Morimoto
2012-11-08sh: clkfwk: add sh_clk_fsidiv_register()Kuninori Morimoto
2012-05-25sh: clkfwk: Consolidate div clk registration helper.Paul Mundt
2012-05-25sh: clkfwk: Consolidate div6/div4 clk_ops definitions.Paul Mundt
2012-05-25sh: clkfwk: Use shared sh_clk_div_enable/disable().Paul Mundt
2012-05-25sh: clkfwk: Use shared sh_clk_div_set_rate()Paul Mundt
2012-05-25sh: clkfwk: Use shared sh_clk_div_recalc().Paul Mundt
2012-05-25sh: clkfwk: Introduce a div_mask for variable div types.Paul Mundt
2012-05-25sh: clkfwk: Move to common clk_div_table accessors for div4/div6.Paul Mundt
2012-04-12sh: clkfwk: Support variable size accesses for div4/div6 clocks.Paul Mundt
2012-04-11sh: clkfwk: Support variable size accesses for MSTP clocks.Paul Mundt
2012-03-12sh: convert cpg code to sh_clk_opsMagnus Damm
2012-01-24sh: clkfwk: bugfix: use clk_reparent() for div6 clocksKuninori Morimoto
2012-01-10sh: clkfwk: sh_clk_init_parent() should be called after clk_register()Kuninori Morimoto
2011-12-09sh: use ioread32/iowrite32 and mapped_reg for div6Magnus Damm
2011-12-09sh: use ioread32/iowrite32 and mapped_reg for div4Magnus Damm
2011-12-09sh: use ioread32/iowrite32 and mapped_reg for mstp32Magnus Damm
2011-11-24sh: clkfwk: setup clock parent from current register valueKuninori Morimoto
2011-04-18sh: clkfwk: fixup clk_rate_table_build parameter in div6 clockKuninori Morimoto
2010-11-19sh: clkfwk: Build fix for non-legacy CPG changes.Paul Mundt
2010-11-15sh: clkfwk: Kill off now unused algo_id in set_rate op.Paul Mundt
2010-10-18sh: clkfwk: Shuffle around to match the intc split up.Paul Mundt