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2014-12-11mtd: spi-nor: add a helper to find the spi_device_idHuang Shijie
Add the spi_nor_match_id() to find the proper spi_device_id with the NOR flash's name in the spi_nor_ids table. Signed-off-by: Huang Shijie <b32955@freescale.com> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Change-Id: I471348a87ccde741055745d14cd25c84b480a803 Reviewed-on: http://git.am.freescale.net:8181/15508 Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com> Tested-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11mtd: spi-nor: add the framework for SPI NORHuang Shijie
This patch cloned most of the m25p80.c. In theory, it adds a new spi-nor layer. Before this patch, the layer is like: MTD ------------------------ m25p80 ------------------------ spi bus driver ------------------------ SPI NOR chip After this patch, the layer is like: MTD ------------------------ spi-nor ------------------------ m25p80 ------------------------ spi bus driver ------------------------ SPI NOR chip With the spi-nor controller driver(Freescale Quadspi), it looks like: MTD ------------------------ spi-nor ------------------------ fsl-quadspi ------------------------ SPI NOR chip New APIs: spi_nor_scan: used to scan a spi-nor flash. Signed-off-by: Huang Shijie <b32955@freescale.com> Acked-by: Marek Vasut <marex@denx.de> [Brian: rebased to include additional m25p_ids[] entry] Signed-off-by: Brian Norris <computersforpeace@gmail.com> Change-Id: I7c22c4c83350eac8c325ccd8292450fde79bb069 Reviewed-on: http://git.am.freescale.net:8181/15507 Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com> Tested-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11dmaengine: fsl-edma: add S/G support for big-endian eDMA modelJingchang Lu
The hardware Scatter/Gather requires the to-be auto loaded TCDs struct in memory retains the same endian as the core independent of the model's register endian, the auto load engine will do the swap if need. Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com> Change-Id: I4251239bd06a64c166873f05e5799d95b267ead8 Reviewed-on: http://git.am.freescale.net:8181/19200 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Huan Wang <alison.wang@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11crypto: caam - Dynamic allocation of addresses for various memory blocks in ↵Nitesh Narayan Lal
CAAM. CAAM's memory is broken into following address blocks: Block Included Registers 0 General Registers 1-4 Job ring registers 6 RTIC registers 7 QI registers 8 DECO and CCB Size of the above stated blocks varies in various platforms. The block size can be 4K or 64K. The block size can be dynamically determined by reading CTPR register in CAAM. This patch initializes the block addresses dynamically based on the value read from this register. Signed-off-by: Ruchika Gupta <r66431@freescale.com> Signed-off-by: Nitesh Narayan Lal <b44382@freescale.com> Change-Id: I0ff5e5fe947134c56014544f335843dcc1595259 Reviewed-on: http://git.am.freescale.net:8181/17748 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Ruchika Gupta <ruchika.gupta@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11crypto: caam - fix uninitialized state->buf_dma fieldHoria Geanta
state->buf_dma not being initialized can cause try_buf_map_to_sec4_sg to try to free unallocated DMA memory: caam_jr ffe301000.jr: DMA-API: device driver tries to free DMA memory it has not allocated [device address=0x000000002eb15068] [size=0 bytes] WARNING: at lib/dma-debug.c:1080 Modules linked in: caamhash(+) [last unloaded: caamhash] CPU: 0 PID: 1387 Comm: cryptomgr_test Tainted: G W 3.16.0-rc1 #23 task: eed24e90 ti: eebd0000 task.ti: eebd0000 NIP: c02889fc LR: c02889fc CTR: c02d7020 REGS: eebd1a50 TRAP: 0700 Tainted: G W (3.16.0-rc1) MSR: 00029002 <CE,EE,ME> CR: 44042082 XER: 00000000 GPR00: c02889fc eebd1b00 eed24e90 0000008d c1de3478 c1de382c 00000000 00029002 GPR08: 00000007 00000000 01660000 00000000 24042082 00000000 c07a1900 eeda2a40 GPR16: 005d62a0 c078ad4c 00000000 eeb15068 c07e1e10 c0da1180 00029002 c0d97408 GPR24: c62497a0 00000014 eebd1b58 00000000 c078ad4c ee130210 00000000 2eb15068 NIP [c02889fc] check_unmap+0x8ac/0xab0 LR [c02889fc] check_unmap+0x8ac/0xab0 Call Trace: [eebd1b00] [c02889fc] check_unmap+0x8ac/0xab0 (unreliable) --- Exception: 0 at (null) LR = (null) [eebd1b50] [c0288c78] debug_dma_unmap_page+0x78/0x90 (unreliable) [eebd1bd0] [f956f738] ahash_final_ctx+0x6d8/0x7b0 [caamhash] [eebd1c30] [c022ff4c] __test_hash+0x2ac/0x6c0 [eebd1de0] [c0230388] test_hash+0x28/0xb0 [eebd1e00] [c02304a4] alg_test_hash+0x94/0xc0 [eebd1e20] [c022fa94] alg_test+0x114/0x2e0 [eebd1ea0] [c022cd1c] cryptomgr_test+0x4c/0x60 [eebd1eb0] [c00497a4] kthread+0xc4/0xe0 [eebd1f40] [c000f2fc] ret_from_kernel_thread+0x5c/0x64 Instruction dump: 41de01c8 80a9002c 2f850000 40fe0008 80a90008 80fa0018 3c60c06d 811a001c 3863f4a4 813a0020 815a0024 4830cd01 <0fe00000> 81340048 2f890000 40feff48 Signed-off-by: Horia Geanta <horia.geanta@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit de0e35ec2b72be30892f28a939c358af1df4fa2c) Change-Id: I7a3df37981b64f28191fee3f91332c371a179fc1 Reviewed-on: http://git.am.freescale.net:8181/17747 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11crypto: caam - fix uninitialized edesc->dst_dma fieldHoria Geanta
dst_dma not being properly initialized causes ahash_done_ctx_dst to try to free unallocated DMA memory: caam_jr ffe301000.jr: DMA-API: device driver tries to free DMA memory it has not allocated [device address=0x0000000006513340] [size=28 bytes] WARNING: at lib/dma-debug.c:1080 Modules linked in: caamhash(+) [last unloaded: caamhash] CPU: 0 PID: 1373 Comm: cryptomgr_test Tainted: G W 3.16.0-rc1 #23 task: ee23e350 ti: effd2000 task.ti: ee1f6000 NIP: c02889fc LR: c02889fc CTR: c02d7020 REGS: effd3d50 TRAP: 0700 Tainted: G W (3.16.0-rc1) MSR: 00029002 <CE,EE,ME> CR: 44048082 XER: 00000000 GPR00: c02889fc effd3e00 ee23e350 0000008e c1de3478 c1de382c 00000000 00029002 GPR08: 00000007 00000000 01660000 00000000 24048082 00000000 00000018 c07db080 GPR16: 00000006 00000100 0000002c eeb4a7e0 c07e1e10 c0da1180 00029002 c0d9b3c8 GPR24: eeb4a7c0 00000000 effd3e58 00000000 c078ad4c ee130210 00000000 06513340 NIP [c02889fc] check_unmap+0x8ac/0xab0 LR [c02889fc] check_unmap+0x8ac/0xab0 Call Trace: [effd3e00] [c02889fc] check_unmap+0x8ac/0xab0 (unreliable) [effd3e50] [c0288c78] debug_dma_unmap_page+0x78/0x90 [effd3ed0] [f94b89ec] ahash_done_ctx_dst+0x11c/0x200 [caamhash] [effd3f00] [c0429640] caam_jr_dequeue+0x1c0/0x280 [effd3f50] [c002c94c] tasklet_action+0xcc/0x1a0 [effd3f80] [c002cb30] __do_softirq+0x110/0x220 [effd3fe0] [c002cf34] irq_exit+0xa4/0xe0 [effd3ff0] [c000d834] call_do_irq+0x24/0x3c [ee1f7ae0] [c000489c] do_IRQ+0x8c/0x110 [ee1f7b00] [c000f86c] ret_from_except+0x0/0x18 --- Exception: 501 at _raw_spin_unlock_irq+0x30/0x50 LR = _raw_spin_unlock_irq+0x2c/0x50 [ee1f7bd0] [c0590158] wait_for_common+0xb8/0x170 [ee1f7c10] [c059024c] wait_for_completion_interruptible+0x1c/0x40 [ee1f7c20] [c022fc78] do_one_async_hash_op.isra.2.part.3+0x18/0x40 [ee1f7c30] [c022ffb8] __test_hash+0x318/0x6c0 [ee1f7de0] [c0230388] test_hash+0x28/0xb0 [ee1f7e00] [c02304a4] alg_test_hash+0x94/0xc0 [ee1f7e20] [c022fa94] alg_test+0x114/0x2e0 [ee1f7ea0] [c022cd1c] cryptomgr_test+0x4c/0x60 [ee1f7eb0] [c00497a4] kthread+0xc4/0xe0 [ee1f7f40] [c000f2fc] ret_from_kernel_thread+0x5c/0x64 Instruction dump: 41de01c8 80a9002c 2f850000 40fe0008 80a90008 80fa0018 3c60c06d 811a001c 3863f4a4 813a0020 815a0024 4830cd01 <0fe00000> 81340048 2f890000 40feff48 Signed-off-by: Horia Geanta <horia.geanta@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit 76b99080ccc964163b4567fac2bb8619f5ed789f) Change-Id: I8eb93e0c4282d45d70b67941cea62441221df845 Reviewed-on: http://git.am.freescale.net:8181/17746 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com> Tested-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11crypto: caam - fix uninitialized S/G table size in ahash_digestHoria Geanta
Not initializing edesc->sec4_sg_bytes correctly causes ahash_done callback to free unallocated DMA memory: caam_jr ffe301000.jr: DMA-API: device driver tries to free DMA memory it has not allocated [device address=0x300900000000b44d] [size=46158 bytes] WARNING: at lib/dma-debug.c:1080 Modules linked in: caamhash(+) [last unloaded: caamhash] CPU: 0 PID: 1358 Comm: cryptomgr_test Tainted: G W 3.16.0-rc1 #23 task: eed04250 ti: effd2000 task.ti: c6046000 NIP: c02889fc LR: c02889fc CTR: c02d7020 REGS: effd3d50 TRAP: 0700 Tainted: G W (3.16.0-rc1) MSR: 00029002 <CE,EE,ME> CR: 44048082 XER: 00000000 GPR00: c02889fc effd3e00 eed04250 00000091 c1de3478 c1de382c 00000000 00029002 GPR08: 00000007 00000000 01660000 00000000 22048082 00000000 00000018 c07db080 GPR16: 00000006 00000100 0000002c ee2497e0 c07e1e10 c0da1180 00029002 c0d912c8 GPR24: 00000014 ee2497c0 effd3e58 00000000 c078ad4c ee130210 30090000 0000b44d NIP [c02889fc] check_unmap+0x8ac/0xab0 LR [c02889fc] check_unmap+0x8ac/0xab0 Call Trace: [effd3e00] [c02889fc] check_unmap+0x8ac/0xab0 (unreliable) [effd3e50] [c0288c78] debug_dma_unmap_page+0x78/0x90 [effd3ed0] [f9404fec] ahash_done+0x11c/0x190 [caamhash] [effd3f00] [c0429640] caam_jr_dequeue+0x1c0/0x280 [effd3f50] [c002c94c] tasklet_action+0xcc/0x1a0 [effd3f80] [c002cb30] __do_softirq+0x110/0x220 [effd3fe0] [c002cf34] irq_exit+0xa4/0xe0 [effd3ff0] [c000d834] call_do_irq+0x24/0x3c [c6047ae0] [c000489c] do_IRQ+0x8c/0x110 [c6047b00] [c000f86c] ret_from_except+0x0/0x18 --- Exception: 501 at _raw_spin_unlock_irq+0x30/0x50 LR = _raw_spin_unlock_irq+0x2c/0x50 [c6047bd0] [c0590158] wait_for_common+0xb8/0x170 [c6047c10] [c059024c] wait_for_completion_interruptible+0x1c/0x40 [c6047c20] [c022fc78] do_one_async_hash_op.isra.2.part.3+0x18/0x40 [c6047c30] [c022ff98] __test_hash+0x2f8/0x6c0 [c6047de0] [c0230388] test_hash+0x28/0xb0 [c6047e00] [c0230458] alg_test_hash+0x48/0xc0 [c6047e20] [c022fa94] alg_test+0x114/0x2e0 [c6047ea0] [c022cd1c] cryptomgr_test+0x4c/0x60 [c6047eb0] [c00497a4] kthread+0xc4/0xe0 [c6047f40] [c000f2fc] ret_from_kernel_thread+0x5c/0x64 Instruction dump: 41de01c8 80a9002c 2f850000 40fe0008 80a90008 80fa0018 3c60c06d 811a001c 3863f4a4 813a0020 815a0024 4830cd01 <0fe00000> 81340048 2f890000 40feff48 Signed-off-by: Horia Geanta <horia.geanta@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit 45e9af78b1abb00b7c394a7ce4e72584c3ca0eb8) Change-Id: Id66573defe2b61fb9d33ed05de221e8524418508 Reviewed-on: http://git.am.freescale.net:8181/17745 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com> Tested-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11crypto: caam - fix DMA direction mismatch in ahash_done_ctx_srcHoria Geanta
caam_jr ffe301000.jr: DMA-API: device driver frees DMA memory with different direction [device address=0x0000000006271dac] [size=28 bytes] [mapped with DMA_TO_DEVICE] [unmapped with DMA_FROM_DEVICE] ------------[ cut here ]------------ WARNING: at lib/dma-debug.c:1131 Modules linked in: caamhash(+) [last unloaded: caamhash] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G W 3.16.0-rc1 #23 task: c0789380 ti: effd2000 task.ti: c07d6000 NIP: c02885cc LR: c02885cc CTR: c02d7020 REGS: effd3d50 TRAP: 0700 Tainted: G W (3.16.0-rc1) MSR: 00021002 <CE,ME> CR: 44048082 XER: 00000000 GPR00: c02885cc effd3e00 c0789380 000000c6 c1de3478 c1de382c 00000000 00021002 GPR08: 00000007 00000000 01660000 0000012f 84048082 00000000 00000018 c07db080 GPR16: 00000006 00000100 0000002c c62517a0 c07e1e10 c0da1180 00029002 c0d95f88 GPR24: c07a0000 c07a4acc effd3e58 ee322bc0 0000001c ee130210 00000000 c0d95f80 NIP [c02885cc] check_unmap+0x47c/0xab0 LR [c02885cc] check_unmap+0x47c/0xab0 Call Trace: [effd3e00] [c02885cc] check_unmap+0x47c/0xab0 (unreliable) [effd3e50] [c0288c78] debug_dma_unmap_page+0x78/0x90 [effd3ed0] [f9624d84] ahash_done_ctx_src+0xa4/0x200 [caamhash] [effd3f00] [c0429640] caam_jr_dequeue+0x1c0/0x280 [effd3f50] [c002c94c] tasklet_action+0xcc/0x1a0 [effd3f80] [c002cb30] __do_softirq+0x110/0x220 [effd3fe0] [c002cf34] irq_exit+0xa4/0xe0 [effd3ff0] [c000d834] call_do_irq+0x24/0x3c [c07d7d50] [c000489c] do_IRQ+0x8c/0x110 [c07d7d70] [c000f86c] ret_from_except+0x0/0x18 --- Exception: 501 at _raw_spin_unlock_irq+0x30/0x50 LR = _raw_spin_unlock_irq+0x2c/0x50 [c07d7e40] [c0053084] finish_task_switch+0x74/0x130 [c07d7e60] [c058f278] __schedule+0x238/0x620 [c07d7f70] [c058fb50] schedule_preempt_disabled+0x10/0x20 [c07d7f80] [c00686a0] cpu_startup_entry+0x100/0x1b0 [c07d7fb0] [c074793c] start_kernel+0x338/0x34c [c07d7ff0] [c00003d8] set_ivor+0x140/0x17c Instruction dump: 7d495214 7d294214 806a0010 80c90010 811a001c 813a0020 815a0024 90610008 3c60c06d 90c1000c 3863f764 4830d131 <0fe00000> 3c60c06d 3863f0f4 4830d121 ---[ end trace db1fae088c75c280 ]--- Mapped at: [<f96251bc>] ahash_final_ctx+0x14c/0x7b0 [caamhash] [<c022ff4c>] __test_hash+0x2ac/0x6c0 [<c0230388>] test_hash+0x28/0xb0 [<c02304a4>] alg_test_hash+0x94/0xc0 [<c022fa94>] alg_test+0x114/0x2e0 Signed-off-by: Horia Geanta <horia.geanta@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit bc9e05f9e770b9c6a1bcc0cdee676e74e5a04fd2) Change-Id: I67764d2c3f2c4f7f6d155717a16d474d43a0c410 Reviewed-on: http://git.am.freescale.net:8181/17744 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com> Tested-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11crypto: caam - fix DMA direction mismatch in ahash_done_ctx_dstHoria Geanta
caam_jr ffe301000.jr: DMA-API: device driver frees DMA memory with different direction [device address=0x00000000062ad1ac] [size=28 bytes] [mapped with DMA_FROM_DEVICE] [unmapped with DMA_TO_DEVICE] ------------[ cut here ]------------ WARNING: at lib/dma-debug.c:1131 Modules linked in: caamhash(+) [last unloaded: caamhash] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G W 3.16.0-rc1 #23 task: c0789380 ti: effd2000 task.ti: c07d6000 NIP: c02885cc LR: c02885cc CTR: c02d7020 REGS: effd3d50 TRAP: 0700 Tainted: G W (3.16.0-rc1) MSR: 00021002 <CE,ME> CR: 44048082 XER: 00000000 GPR00: c02885cc effd3e00 c0789380 000000c6 c1de3478 c1de382c 00000000 00021002 GPR08: 00000007 00000000 01660000 0000012f 84048082 00000000 00000018 c07db080 GPR16: 00000006 00000100 0000002c eee567e0 c07e1e10 c0da1180 00029002 c0d96708 GPR24: c07a0000 c07a4acc effd3e58 ee29b140 0000001c ee130210 00000000 c0d96700 NIP [c02885cc] check_unmap+0x47c/0xab0 LR [c02885cc] check_unmap+0x47c/0xab0 Call Trace: [effd3e00] [c02885cc] check_unmap+0x47c/0xab0 (unreliable) [effd3e50] [c0288c78] debug_dma_unmap_page+0x78/0x90 [effd3ed0] [f9350974] ahash_done_ctx_dst+0xa4/0x200 [caamhash] [effd3f00] [c0429640] caam_jr_dequeue+0x1c0/0x280 [effd3f50] [c002c94c] tasklet_action+0xcc/0x1a0 [effd3f80] [c002cb30] __do_softirq+0x110/0x220 [effd3fe0] [c002cf34] irq_exit+0xa4/0xe0 [effd3ff0] [c000d834] call_do_irq+0x24/0x3c [c07d7d50] [c000489c] do_IRQ+0x8c/0x110 [c07d7d70] [c000f86c] ret_from_except+0x0/0x18 --- Exception: 501 at _raw_spin_unlock_irq+0x30/0x50 LR = _raw_spin_unlock_irq+0x2c/0x50 [c07d7e40] [c0053084] finish_task_switch+0x74/0x130 [c07d7e60] [c058f278] __schedule+0x238/0x620 [c07d7f70] [c058fb50] schedule_preempt_disabled+0x10/0x20 [c07d7f80] [c00686a0] cpu_startup_entry+0x100/0x1b0 [c07d7fb0] [c074793c] start_kernel+0x338/0x34c [c07d7ff0] [c00003d8] set_ivor+0x140/0x17c Instruction dump: 7d495214 7d294214 806a0010 80c90010 811a001c 813a0020 815a0024 90610008 3c60c06d 90c1000c 3863f764 4830d131 <0fe00000> 3c60c06d 3863f0f4 4830d121 ---[ end trace db1fae088c75c270 ]--- Mapped at: [<f9352454>] ahash_update_first+0x5b4/0xba0 [caamhash] [<c022ff28>] __test_hash+0x288/0x6c0 [<c0230388>] test_hash+0x28/0xb0 [<c02304a4>] alg_test_hash+0x94/0xc0 [<c022fa94>] alg_test+0x114/0x2e0 Signed-off-by: Horia Geanta <horia.geanta@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit ef62b2310b4c783a70eba78f29695687d8cdc8df) Change-Id: I9059e608d14ac8c67897ed7b8c04851550de6f37 Reviewed-on: http://git.am.freescale.net:8181/17743 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com> Tested-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11crypto: caam - fix DMA unmapping error in hash_digest_keyHoria Geanta
Key being hashed is unmapped using the digest size instead of initial length: caam_jr ffe301000.jr: DMA-API: device driver frees DMA memory with different size [device address=0x000000002eeedac0] [map size=80 bytes] [unmap size=20 bytes] ------------[ cut here ]------------ WARNING: at lib/dma-debug.c:1090 Modules linked in: caamhash(+) CPU: 0 PID: 1327 Comm: cryptomgr_test Not tainted 3.16.0-rc1 #23 task: eebda5d0 ti: ee26a000 task.ti: ee26a000 NIP: c0288790 LR: c0288790 CTR: c02d7020 REGS: ee26ba30 TRAP: 0700 Not tainted (3.16.0-rc1) MSR: 00021002 <CE,ME> CR: 44022082 XER: 00000000 GPR00: c0288790 ee26bae0 eebda5d0 0000009f c1de3478 c1de382c 00000000 00021002 GPR08: 00000007 00000000 01660000 0000012f 82022082 00000000 c07a1900 eeda29c0 GPR16: 00000000 c61deea0 000c49a0 00000260 c07e1e10 c0da1180 00029002 c0d9ef08 GPR24: c07a0000 c07a4acc ee26bb38 ee2765c0 00000014 ee130210 00000000 00000014 NIP [c0288790] check_unmap+0x640/0xab0 LR [c0288790] check_unmap+0x640/0xab0 Call Trace: [ee26bae0] [c0288790] check_unmap+0x640/0xab0 (unreliable) [ee26bb30] [c0288c78] debug_dma_unmap_page+0x78/0x90 [ee26bbb0] [f929c3d4] ahash_setkey+0x374/0x720 [caamhash] [ee26bc30] [c022fec8] __test_hash+0x228/0x6c0 [ee26bde0] [c0230388] test_hash+0x28/0xb0 [ee26be00] [c0230458] alg_test_hash+0x48/0xc0 [ee26be20] [c022fa94] alg_test+0x114/0x2e0 [ee26bea0] [c022cd1c] cryptomgr_test+0x4c/0x60 [ee26beb0] [c00497a4] kthread+0xc4/0xe0 [ee26bf40] [c000f2fc] ret_from_kernel_thread+0x5c/0x64 Instruction dump: 41de03e8 83da0020 3c60c06d 83fa0024 3863f520 813b0020 815b0024 80fa0018 811a001c 93c10008 93e1000c 4830cf6d <0fe00000> 3c60c06d 3863f0f4 4830cf5d ---[ end trace db1fae088c75c26c ]--- Mapped at: [<f929c15c>] ahash_setkey+0xfc/0x720 [caamhash] [<c022fec8>] __test_hash+0x228/0x6c0 [<c0230388>] test_hash+0x28/0xb0 [<c0230458>] alg_test_hash+0x48/0xc0 [<c022fa94>] alg_test+0x114/0x2e0 Signed-off-by: Horia Geanta <horia.geanta@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit e11aa9f1351f150ee9f0166bffc5e007c81c1364) Change-Id: I570eaf170295c91e2ce7f7367ed31c9fd5c9369d Reviewed-on: http://git.am.freescale.net:8181/17742 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com> Tested-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11crypto: caam - fix "failed to check map error" DMA warningsHoria Geanta
Use dma_mapping_error for every dma_map_single / dma_map_page. Signed-off-by: Horia Geanta <horia.geanta@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit ce572085282128d57324aabf415673dfbfa32d54) Conflicts: drivers/crypto/caam/caamalg.c Change-Id: I1e2466043f87dc74c955ebfae0aad45be7ac8de9 Reviewed-on: http://git.am.freescale.net:8181/17741 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Horia Ioan Geanta Neag <horia.geanta@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com> Tested-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11crypto: caam - fix typo in dma_mapping_errorHoria Geanta
dma_mapping_error checks for an incorrect DMA address: s/ctx->sh_desc_enc_dma/ctx->sh_desc_dec_dma Signed-off-by: Horia Geanta <horia.geanta@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit 71c65f7c90a176877ad1aa87b752217db61148a8) Change-Id: If55f0e154763c9a293adc6fbc44e9eb01e5fcbc5 Reviewed-on: http://git.am.freescale.net:8181/17740 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com> Tested-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11crypto: caam - fix DECO RSR pollingHoria Geanta
RSR (Request Source Register) is not used when virtualization is disabled, thus don't poll for Valid bit. Besides this, if used, timeout has to be reinitialized. Signed-off-by: Horia Geanta <horia.geanta@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit 8f1da7b945b65513fb02b75ce25040c67ce32726) Change-Id: I970dc02469553034efe2bcf7431d104b911a6c76 Reviewed-on: http://git.am.freescale.net:8181/17739 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Ruchika Gupta <ruchika.gupta@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com> Tested-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11crypto: caam - Correct the dma mapping for sg tableRuchika Gupta
At few places in caamhash and caamalg, after allocating a dmable buffer for sg table , the buffer was being modified. As per definition of DMA_FROM_DEVICE ,afer allocation the memory should be treated as read-only by the driver. This patch shifts the allocation of dmable buffer for sg table after it is populated by the driver, making it read-only as per the DMA API's requirement. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit 1da2be33ad4c30a2b1d5fe3053b5b7f63e6e2baa) Change-Id: I485040b955e27772c20623f037e8a5167404c18d Reviewed-on: http://git.am.freescale.net:8181/17736 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com> Tested-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11crypto: caam - Add definition of rd/wr_reg64 for little endian platformRuchika Gupta
CAAM IP has certain 64 bit registers . 32 bit architectures cannot force atomic-64 operations. This patch adds definition of these atomic-64 operations for little endian platforms. The definitions which existed previously were for big endian platforms. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit ef94b1d834aace7101de77c3a7c2631b9ae9c5f6) Change-Id: Ieb2e1cccb475f380f44735b6b6d633514e9ab3e3 Reviewed-on: http://git.am.freescale.net:8181/17735 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com> Tested-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11crypto: caam - Configuration for platforms with virtualization enabled in CAAMRuchika Gupta
For platforms with virtualization enabled 1. The job ring registers can be written to only is the job ring has been started i.e STARTR bit in JRSTART register is 1 2. For DECO's under direct software control, with virtualization enabled PL, BMT, ICID and SDID values need to be provided. These are provided by selecting a Job ring in start mode whose parameters would be used for the DECO access programming. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit 17157c90a8abf9323ee2a3daac7ad9f696642dda) Conflicts: drivers/crypto/caam/ctrl.c drivers/crypto/caam/intern.h Change-Id: I8adb64fd4ba06f1007ae6838ad4f5b3ecd04bdc9 Reviewed-on: http://git.am.freescale.net:8181/17734 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Ruchika Gupta <ruchika.gupta@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com> Tested-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11crypto: caam - Correct definition of registers in memory mapRuchika Gupta
Some registers like SECVID, CHAVID, CHA Revision Number, CTPR were defined as 64 bit resgisters. The IP provides a DWT bit(Double word Transpose) to transpose the two words when a double word register is accessed. However setting this bit would also affect the operation of job descriptors as well as other registers which are truly double word in nature. So, for the IP to work correctly on big-endian as well as little-endian SoC's, change is required to access all 32 bit registers as 32 bit quantities. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit eb1139cd437afadc63f58159c111e3f166bddb51) Conflicts: drivers/crypto/caam/ctrl.c Change-Id: I4b9e3c8a438e6ce485a09dd485a1c463ec38953a Reviewed-on: http://git.am.freescale.net:8181/17733 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Ruchika Gupta <ruchika.gupta@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com> Tested-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11crypto: caam - Define setbits32() and clrbits32() for ARM in the Freescale ↵Victoria Milhoan (b42089)
CAAM driver The kernel defines setbits32() and clrbits32() macros only for Power-based architectures. This patch modifies the Freescale CAAM driver to add macros for use on ARM architectures. Signed-off-by: Victoria Milhoan (b42089) <vicki.milhoan@freescale.com> Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> (cherry picked from commit 54fbc7392ac344cb94c44a2d8e1e0a16c950a5cd) Change-Id: Ia8065d9722bf5b7e60fd269d345b0b8c95ee96da Reviewed-on: http://git.am.freescale.net:8181/17732 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com> Tested-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11crypto: caam - writel() arguments are swappedDan Carpenter
My guess is that this little endian configuration is never found in real life, but if it were then the writel() arguments are in the wrong order so the driver would crash immediately. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit f829e7a32c9434e31e565bc79f5804a7a984c10f) Change-Id: I8aa8e70dca9affa5da01b80e1968381beeb460eb Reviewed-on: http://git.am.freescale.net:8181/17731 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Ruchika Gupta <ruchika.gupta@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com> Tested-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11clk: ppc-corenet: rename to ppc-qoriq for better representionJingchang Lu
The IP is shared on PPC and ARM, rename it to qoriq for better represention. Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com> Change-Id: Ib02baa7731d9d1d9955ffde9860deb517d8d7ca8 Reviewed-on: http://git.am.freescale.net:8181/17836 Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
2014-12-11tty: of_serial: add of support for Freescale 64-byte FIFO UARTJingchang Lu
Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com> Change-Id: I667cb31ce4b5e8f5c2a4c5f2b88e677eb991b9b3 Reviewed-on: http://git.am.freescale.net:8181/17834 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Huan Wang <alison.wang@freescale.com> Reviewed-by: Li Xiubo <Li.Xiubo@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11clk: ppc-corenet: remove "fsl,sys-clock" compatible added by LS1Jingchang Lu
The "fixed-clock" could handle the sysclk node properly. Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com> Change-Id: I1b7fdf0be4f19a32d14240566e17bae2152578d6 Reviewed-on: http://git.am.freescale.net:8181/17832 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Huan Wang <alison.wang@freescale.com> Reviewed-by: Li Xiubo <Li.Xiubo@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11dmaengine: fsl-edma: add dma memcpy supportJingchang Lu
The eDMA channel support the mem2mem copy with the always on slot number 63. Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com>
2014-12-11dmaengine: fsl-edma: swap 8-/16-bit registers offset in big-endian modeJingchang Lu
As the IP design, all 8-bit and 16-bit registers offset adddress should be swapped in big-endian mode opposite to little-endian mode. Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com>
2014-12-11dmaengine: fsl-edma: fix dmamux index calculating errorJingchang Lu
Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com> --- This patch has been sent to upstream: https://patchwork.kernel.org/patch/4457391/
2014-12-11dma: fix eDMA driver as a subsys_initcallYuan Yao
Because of some driver base on DMA, changed the initcall order as subsys_initcall. Signed-off-by: Yuan Yao <yao.yuan@freescale.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> --- This patch is pulled back from upstream: commit 8edc51c197b8f409bef7b21755254e6f3ce7ed23
2014-12-11dma: fsl-edma: fix static checker warning of NULL dereferenceJingchang Lu
The static checker reports following warning: drivers/dma/fsl-edma.c:732 fsl_edma_xlate() error: we previously assumed 'chan' could be null (see line 737) The changes of the loop cursor in the iteration may result in NULL dereference when dma_get_slave_channel failed but loop will continue. So use list_for_each_entry_safe() instead of list_for_each_entry() to against this. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Jingchang Lu <b35083@freescale.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> --- This patch is pulled back from upstream: commit 178c81e58e91559fd2c6b1cae43c8f573a2ead36
2014-12-11dma: Add Freescale eDMA engine driver supportJingchang Lu
Add Freescale enhanced direct memory(eDMA) controller support. This module can be found on Vybrid and LS-1 SoCs. Signed-off-by: Alison Wang <b18965@freescale.com> Signed-off-by: Jingchang Lu <b35083@freescale.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com> --- This patch is pulled back from upstream: commit d6be34fbd39b7d577d25cb4edec538e8990ba07c
2014-12-11tty: serial: fsl_lpuart: add 32-bit register interface supportJingchang Lu
This add the big-endian 32-bit register version LPUART support. Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com> --- This patch has been sent to upstream: https://patchwork.kernel.org/patch/4544291/
2014-12-11clk: ppc-corenet: Add CLK_OF_DECLARE supportJingchang Lu
Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com>
2014-12-11clk: ppc-corenet: Fix Section mismatch warningJingchang Lu
WARNING: drivers/built-in.o(.data+0x10258): Section mismatch in reference from the variable ppc_corenet_clk_driver to the (unknown reference) .init.rodata:(unknown) The variable ppc_corenet_clk_driver references the (unknown reference) __initconst (unknown) If the reference is valid then annotate the variable with __init* or __refdata (see linux/init.h) or name the variable: *_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com> --- This patch is pulled back from upstream: commit da788acb28386aa896224e784954bb73c99ff26c
2014-12-11Merge commit '60cce3da4a8393d1e15bf1a9dbe3956a8aaabbaf'Rich Schmitt
2014-12-11offline_port: fix dt parser for tx frame queuesMarian Cristian Rotariu
With the current implementation the user has the possibility to initialize some queues that exit the offline port. The format of the device tree format is: fsl,qman-frame-queues-egress = <base_id1 count1 ... base_idn countn>; fsl,qman-channel-ids-egress = <channel_id1 ... channel_idn>; Intuitively, the base_id1, count1 frame queues batch are placed in the channel_id1 QMan channel. Because the list_add() adds an entry at the beginning of the list, the map between the frame queues and their channel ID is reversed. This patch adds a particular entry at the end of the fq list using list_add_tail() function. Signed-off-by: Marian Cristian Rotariu <marian.rotariu@freescale.com> Change-Id: I8d3a2fd3c36f63d15837ffe90bf6e4e8b041a3e5 Reviewed-on: http://git.am.freescale.net:8181/20154 Reviewed-by: Madalin-Cristian Bucur <madalin.bucur@freescale.com> Tested-by: Marian Cristian Rotariu <marian.rotariu@freescale.com>
2014-10-19fmd: force port down when qbmi busyMandy Lavi
Change-Id: I17411cd51bb88c5294bbdf97b8bd18609a00a7f6 Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/17708 Reviewed-by: Igal Liberman <Igal.Liberman@freescale.com> Reviewed-by: Mandy Lavi <Mandy.Lavi@freescale.com> Tested-by: Mandy Lavi <Mandy.Lavi@freescale.com>
2014-10-08dpaa_eth: accept minimum MTU of at least 68Madalin Bucur
RFC 791 states that the minimum MTU needs to be 68 in order to allow datagram forwarding without further fragmentation. Signed-off-by: Madalin Bucur <madalin.bucur@freescale.com> Change-Id: I4f9602c49a5a9aaac0030f511a6abbf32954f82f Reviewed-on: http://git.am.freescale.net:8181/17073 Reviewed-by: Ruxandra Ioana Radulescu <ruxandra.radulescu@freescale.com>
2014-10-08dpaa_eth: add required and active PAUSE frame settingsCristian Bercaru
Because the pause frame settings of a MAC device are forced to false when the link goes half-duplex and cannot be restored if autonegotiation is disabled, this patch introduces 2 sets of settings: requested and active. Requested settings are introduced by the users, via user-space programs such as ethtool, whereas active settings reflect whether FMan truly enables/disables PAUSE frames on TX/RX. Requested settings can only be changed by the user. Active settings can be changed by events such as auto-negotiation or a change in link duplexity and are derived from requested settings. Signed-off-by: Cristian Bercaru <cristian.bercaru@freescale.com> Change-Id: I5ea563614b28d6ba1827b571097861d39ff8751a Reviewed-on: http://git.am.freescale.net:8181/15553 Reviewed-by: Madalin-Cristian Bucur <madalin.bucur@freescale.com>
2014-10-08dpaa_eth: change type of PAUSE frame settings to booleanCristian Bercaru
This patch changes the type of PAUSE frames settings to boolean because they only accept the values true/false. Signed-off-by: Cristian Bercaru <cristian.bercaru@freescale.com> Change-Id: I6a3926054d4821f12937e96198c8435df38bf95c Reviewed-on: http://git.am.freescale.net:8181/15552 Reviewed-by: Madalin-Cristian Bucur <madalin.bucur@freescale.com> Tested-by: Madalin-Cristian Bucur <madalin.bucur@freescale.com>
2014-10-08fmd: use proper return valueMadalin Bucur
Channel value is uint16_t, return adequate type. Signed-off-by: Madalin Bucur <madalin.bucur@freescale.com> Change-Id: I4295b7f706e9db36ac9d6d02b8896fa11067f612 Reviewed-on: http://git.am.freescale.net:8181/18840 Reviewed-by: Marian Cristian Rotariu <marian.rotariu@freescale.com>
2014-10-08fmd: fix casting warningMandy Lavi
Coverity issue Change-Id: If0a7e1dffa09e3513b7ccb13a1dc09bf91056238 Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/18831 Reviewed-by: Mandy Lavi <Mandy.Lavi@freescale.com> Tested-by: Mandy Lavi <Mandy.Lavi@freescale.com> Reviewed-by: Madalin-Cristian Bucur <madalin.bucur@freescale.com>
2014-10-08dpaa_eth: add explicit cast where neededMadalin Bucur
Signed-off-by: Madalin Bucur <madalin.bucur@freescale.com> Change-Id: I20f1609771d66778acfbbca65e6d0b8ceecb326a Reviewed-on: http://git.am.freescale.net:8181/19077 Reviewed-by: Marian Cristian Rotariu <marian.rotariu@freescale.com>
2014-10-08dpaa_eth: fix dpa_bp_drain()Madalin Bucur
The continue jumps to the end of the loop, condition is evaluated and if ret is not > 0 the loop ends. Setting ret to 1 to continue processing until pool is drained. Signed-off-by: Madalin Bucur <madalin.bucur@freescale.com> Change-Id: If0acf0eba9e1fc814ef61b939d717819a48c7e29 Reviewed-on: http://git.am.freescale.net:8181/19071 Reviewed-by: Bogdan Hamciuc <bogdan.hamciuc@freescale.com> Reviewed-by: Marian Cristian Rotariu <marian.rotariu@freescale.com>
2014-10-08dpaa_eth: add explicit cast where neededMadalin Bucur
Signed-off-by: Madalin Bucur <madalin.bucur@freescale.com> Change-Id: Idc795a681df8b11532e1fdbd2f18c365bfa8a671 Reviewed-on: http://git.am.freescale.net:8181/19007 Reviewed-by: Marian Cristian Rotariu <marian.rotariu@freescale.com>
2014-10-08dpaa_eth: add static qualifierMadalin Bucur
Add static qualifier for several functions. Change channel parameter type to uint16_t. Signed-off-by: Madalin Bucur <madalin.bucur@freescale.com> Change-Id: I759e8174d9bfe915ee11f25f572160d33bf4a9d3 Reviewed-on: http://git.am.freescale.net:8181/18843 Reviewed-by: Marian Cristian Rotariu <marian.rotariu@freescale.com>
2014-10-08dpaa_eth: add comment about unused error codeMadalin Bucur
Signed-off-by: Madalin Bucur <madalin.bucur@freescale.com> Change-Id: Ica8066db566093bc89e50c23694b519820bf7ae8 Reviewed-on: http://git.am.freescale.net:8181/18842 Reviewed-by: Marian Cristian Rotariu <marian.rotariu@freescale.com>
2014-10-08dpaa_eth: verify return valueMadalin Bucur
Signed-off-by: Madalin Bucur <madalin.bucur@freescale.com> Change-Id: Ife32e1984f5dc8f481dad223602163229526b861 Reviewed-on: http://git.am.freescale.net:8181/18841 Reviewed-by: Marian Cristian Rotariu <marian.rotariu@freescale.com>
2014-10-08dpaa_eth: add explicit cast where neededMadalin Bucur
Signed-off-by: Madalin Bucur <madalin.bucur@freescale.com> Change-Id: I6fe0041436e52d76a0677380935d15d8363ddbeb Reviewed-on: http://git.am.freescale.net:8181/18839 Reviewed-by: Marian Cristian Rotariu <marian.rotariu@freescale.com>
2014-10-08dpaa_eth: fix dpa_get_channel return value checkMadalin Bucur
Signed-off-by: Madalin Bucur <madalin.bucur@freescale.com> Change-Id: I5594b9f26210f9a7237bdd51f529d40a2b008115 Reviewed-on: http://git.am.freescale.net:8181/17400 Reviewed-by: Cristian Bercaru <cristian.bercaru@freescale.com>
2014-10-08dpaa_eth: check qman_query_cgr return valueMadalin Bucur
Signed-off-by: Madalin Bucur <madalin.bucur@freescale.com> Change-Id: I21558e105b5c3092e96b7e98b570e5613e8bc771 Reviewed-on: http://git.am.freescale.net:8181/17399 Reviewed-by: Cristian Bercaru <cristian.bercaru@freescale.com>
2014-09-29fmd: do not apply erratum A005127 on fmanV3LMandy Lavi
Change-Id: I3de0664e687cb75564d08758889c0cd0878acfb4 Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/19953 Reviewed-by: Mandy Lavi <Mandy.Lavi@freescale.com> Tested-by: Mandy Lavi <Mandy.Lavi@freescale.com>
2014-09-19FMD: DSAR: Don't disable/enable Tx explicitly. Change call to exit DSAR to ↵Eyal Harari
fm_soc_resume Signed-off-by: Eyal Harari <Eyal.Harari@freesacle.com> Change-Id: I888b95ca0c7f2e13266ecf81c41e779666a6e612 Reviewed-on: http://git.am.freescale.net:8181/19106 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Cristian-Constantin Sovaiala <Cristian.Sovaiala@freescale.com> Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
generated by cgit v0.10.2 at 2024-07-18 11:58:51 (GMT)