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2015-11-26fmd: remove cc-aging supportHEADmasterMandy Lavi
Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com>
2015-11-25fmd: relocate aging_support field to maintain compatibilityMandy Lavi
Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com>
2015-11-24fmd: move compat_copy_fm_pcd_kg_scheme_spc out of DPAA 11 defMandy Lavi
Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com>
2015-11-24fmd: PCD: fix offline port blocked by fragmented IPV6Mandy Lavi
Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com>
2015-11-24fmd: Add support for IPF after HManMandy Lavi
fmd: change cc owners attribute from uint8 to unit16 fmd: change manip owner attribute from uint8 to unit16 fmd: add risc load monitor in sysfs fmd: Fix modification of nodes pointed by HM fmd: add missing fields in pcd_manip_hdr_insrt_ip Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com>
2015-11-24Merge pull request #69 in SDK/linux-devel from ↵Yin Honghua-R63875
~R27762/linux-devel:add_hm_node_stats to master * commit 'a9d0ea5a4d3b679ae3316c93b455d2ccc993772d': fmd: Render header manip node statistics available in user space
2015-11-20drivers: dwc3: Set dma ops for xhci devRajesh Bhagat
Set dmap ops for xhci dev same as dwc3 dev Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@freescale.com>
2015-11-20drivers: dwc3 : Add support for USB snoopingRajesh Bhagat
Add support for USB3 snooping by asserting bits in register DWC3_GSBUSCFG0 for data and descriptor Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@freescale.com>
2015-11-20drivers: dwc3: host: Change burst beat and outstanding pipelined transfers ↵Rajesh Bhagat
requests. This is required for better performance Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@freescale.com>
2015-11-18fmd: add ioctl call to retrieve scheme counter - spcMandy Lavi
Based on FM_PCD_KgSchemeGetCounter() function which is already exposed by the API Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com>
2015-11-16fmd: Render header manip node statistics available in user spaceMarian Chereji
Added a user space interface for the "FM_PCD_ManipGetStatistics" function for retrieving header manipulation nodes statistics (including IP reassembly and fragmentation). Signed-off-by: Marian Chereji <marian.chereji@freescale.com>
2015-11-09fmd: fix compat layer for aging_supportMandy Lavi
This attribute should have been added also to the compat layer while it was implemented in the general layer Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com>
2015-11-09Merge pull request #65 in SDK/linux-devel from ↵Yin Honghua-R63875
~R01356/linux-devel:bugfix/QUSDPA-704-segfault-in-dma_mem-allocator.c to master * commit 'e98f36e86bdfbeb1728ab0de4f2be367d6283963': fsl_usdpaa: Remove TLB entries when unmapping memory
2015-11-09Merge pull request #64 in SDK/linux-devel from ↵Yin Honghua-R63875
~B06830/linux-devel:bugfix/QSDK-2404-cryptodev-linux-sha1-offloading to master * commit '8700bab2995ecc511d8db729e412a056be81e6b5': crypto: caam - Change kmalloc to kzalloc to avoid residual data crypto: caam - fix memory corruption in ahash_final_ctx crypto: caam - Fix incorrect size when DMA unmapping buffer crypto: caam - improve initalization for context state saves
2015-11-09Merge pull request #63 in SDK/linux-devel from ↵Yin Honghua-R63875
~B29983/linux-devel-tyt:QSDK-2438-there-is-some-improper-information to master * commit '418316ce8769300438fc076e04d5ac5e6d7f870d': cpufreq: qoriq: fix output information error
2015-11-09Merge pull request #61 in SDK/linux-devel from ~R54964/linux-devel:bug-fix ↵Yin Honghua-R63875
to master * commit '300c3ff86988bc13e310b58d9c7c786528697150': fsl-qbman: Handle memory leaks fsl-pme: Check for null pointers fsl-dce: Handle memory allocation failures fsl-dce: Correct error paths and add new labels fsl_qbman: null check for lni in qman_ceemt_sp_release
2015-11-03fsl_usdpaa: Remove TLB entries when unmapping memoryRoy Pledge
TLB1 entries must be removed when unmapping a DMA map from a process so they don't point to the wrong physical memory if a new map reuses the same virtual address Signed-off-by: Roy Pledge <Roy.Pledge@freescale.com>
2015-11-03crypto: caam - Change kmalloc to kzalloc to avoid residual dataVictoria Milhoan
Since fields must be ORed in to operate correctly using any order of operations, changed allocations of the combination of extended descriptor structs + hardware scatterlists to use kzalloc() instead of kmalloc(), so as to ensure that residue data would not be ORed in with the correct data. Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com> Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com> Tested-by: Horia Geantă <horia.geanta@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit dde20ae9d63835178ef4ba9655f530e052c08ab9) Conflicts: drivers/crypto/caam/caamalg.c
2015-11-03crypto: caam - fix memory corruption in ahash_final_ctxHoria Geant?
When doing pointer operation for accessing the HW S/G table, a value representing number of entries (and not number of bytes) must be used. Cc: <stable@vger.kernel.org> # 3.6+ Fixes: 045e36780f115 ("crypto: caam - ahash hmac support") Signed-off-by: Horia Geant? <horia.geanta@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit b310c178e6d897f82abb9da3af1cd7c02b09f592)
2015-11-03crypto: caam - Fix incorrect size when DMA unmapping bufferVictoria Milhoan
The CAAM driver uses two data buffers to store data for a hashing operation, with one buffer defined as active. This change forces switching of the active buffer when executing a hashing operation to avoid a later DMA unmap using the length of the opposite buffer. Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit 8af7b0f809a3d34657433ec545d64dff9808ce34)
2015-11-03crypto: caam - improve initalization for context state savesSteve Cornelius
Multiple function in asynchronous hashing use a saved-state block, a.k.a. struct caam_hash_state, which holds a stash of information between requests (init/update/final). Certain values in this state block are loaded for processing using an inline-if, and when this is done, the potential for uninitialized data can pose conflicts. Therefore, this patch improves initialization of state data to prevent false assignments using uninitialized data in the state block. This patch addresses the following traceback, originating in ahash_final_ctx(), although a problem like this could certainly exhibit other symptoms: kernel BUG at arch/arm/mm/dma-mapping.c:465! Unable to handle kernel NULL pointer dereference at virtual address 00000000 pgd = 80004000 [00000000] *pgd=00000000 Internal error: Oops: 805 [#1] PREEMPT SMP Modules linked in: CPU: 0 Not tainted (3.0.15-01752-gdd441b9-dirty #40) PC is at __bug+0x1c/0x28 LR is at __bug+0x18/0x28 pc : [<80043240>] lr : [<8004323c>] psr: 60000013 sp : e423fd98 ip : 60000013 fp : 0000001c r10: e4191b84 r9 : 00000020 r8 : 00000009 r7 : 88005038 r6 : 00000001 r5 : 2d676572 r4 : e4191a60 r3 : 00000000 r2 : 00000001 r1 : 60000093 r0 : 00000033 Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment kernel Control: 10c53c7d Table: 1000404a DAC: 00000015 Process cryptomgr_test (pid: 1306, stack limit = 0xe423e2f0) Stack: (0xe423fd98 to 0xe4240000) fd80: 11807fd1 80048544 fda0: 88005000 e4191a00 e5178040 8039dda0 00000000 00000014 2d676572 e4191008 fdc0: 88005018 e4191a60 00100100 e4191a00 00000000 8039ce0c e423fea8 00000007 fde0: e4191a00 e4227000 e5178000 8039ce18 e419183c 80203808 80a94a44 00000006 fe00: 00000000 80207180 00000000 00000006 e423ff08 00000000 00000007 e5178000 fe20: e41918a4 80a949b4 8c4844e2 00000000 00000049 74227000 8c4844e2 00000e90 fe40: 0000000e 74227e90 ffff8c58 80ac29e0 e423fed4 8006a350 8c81625c e423ff5c fe60: 00008576 e4002500 00000003 00030010 e4002500 00000003 e5180000 e4002500 fe80: e5178000 800e6d24 007fffff 00000000 00000010 e4001280 e4002500 60000013 fea0: 000000d0 804df078 00000000 00000000 00000000 00000000 00000000 00000000 fec0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 fee0: 00000000 00000000 e4227000 e4226000 e4753000 e4752000 e40a5000 e40a4000 ff00: e41e7000 e41e6000 00000000 00000000 00000000 e423ff14 e423ff14 00000000 ff20: 00000400 804f9080 e5178000 e4db0b40 00000000 e4db0b80 0000047c 00000400 ff40: 00000000 8020758c 00000400 ffffffff 0000008a 00000000 e4db0b40 80206e00 ff60: e4049dbc 00000000 00000000 00000003 e423ffa4 80062978 e41a8bfc 00000000 ff80: 00000000 e4049db4 00000013 e4049db0 00000013 00000000 00000000 00000000 ffa0: e4db0b40 e4db0b40 80204cbc 00000013 00000000 00000000 00000000 80204cfc ffc0: e4049da0 80089544 80040a40 00000000 e4db0b40 00000000 00000000 00000000 ffe0: e423ffe0 e423ffe0 e4049da0 800894c4 80040a40 80040a40 00000000 00000000 [<80043240>] (__bug+0x1c/0x28) from [<80048544>] (___dma_single_dev_to_cpu+0x84) [<80048544>] (___dma_single_dev_to_cpu+0x84/0x94) from [<8039dda0>] (ahash_fina) [<8039dda0>] (ahash_final_ctx+0x180/0x428) from [<8039ce18>] (ahash_final+0xc/0) [<8039ce18>] (ahash_final+0xc/0x10) from [<80203808>] (crypto_ahash_op+0x28/0xc) [<80203808>] (crypto_ahash_op+0x28/0xc0) from [<80207180>] (test_hash+0x214/0x5) [<80207180>] (test_hash+0x214/0x5b8) from [<8020758c>] (alg_test_hash+0x68/0x8c) [<8020758c>] (alg_test_hash+0x68/0x8c) from [<80206e00>] (alg_test+0x7c/0x1b8) [<80206e00>] (alg_test+0x7c/0x1b8) from [<80204cfc>] (cryptomgr_test+0x40/0x48) [<80204cfc>] (cryptomgr_test+0x40/0x48) from [<80089544>] (kthread+0x80/0x88) [<80089544>] (kthread+0x80/0x88) from [<80040a40>] (kernel_thread_exit+0x0/0x8) Code: e59f0010 e1a01003 eb126a8d e3a03000 (e5833000) ---[ end trace d52a403a1d1eaa86 ]--- Cc: stable@vger.kernel.org Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com> Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit 6fd4b15603124c1b56e03db29b41ec39d8a077b9)
2015-11-03crypto: caam - enable LARGE_BURST for enhancing DMA transactions sizeHoria Geantă
Increasing CAAM DMA engine transaction size either -reduces the number of required transactions or -adds the ability to transfer more data with same transaction count Signed-off-by: Horia Geantă <horia.geanta@freescale.com>
2015-11-03crypto: caam - make write transactions bufferable on PPC platformsHoria Geantă
Previous change (see "Fixes" tag) to the MCFGR register clears AWCACHE[0] (which is "1" at POR). For PPC-based platforms, this makes all writes non-bufferable, causing a performance drop. Rework previous change such that MCFGR[AWCACHE] is set to: -4'b0001 (default value at POR) for PPC-based platforms -4'b0011 (default value at POR + AWCACHE[1]) for ARM-based platforms Fixes: bcd586241449 ("crypto: caam - fix snooping for write transactions") Signed-off-by: Horia Geantă <horia.geanta@freescale.com>
2015-11-03cpufreq: qoriq: fix output information errorTang Yuantian
This driver is used by both ARM-based core and PowerPC-based core. So PowerPC specific information should be removed. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
2015-11-02fsl-qbman: Handle memory leaksMahammad Ismayilzada
Eliminate memory leaks on error paths Signed-off-by: Mahammad Ismayilzada <mahammad.ismayilzada@freescale.com> Change-Id: I36d1a35f9d48188a9dad043c78e90d787997ea19
2015-11-02fsl-pme: Check for null pointersMahammad Ismayilzada
Check for null pointers to prevent null pointer dereferencing Signed-off-by: Mahammad Ismayilzada <mahammad.ismayilzada@freescale.com> Change-Id: Icc267f51d5ad85187c6ee5d03aa87f8649e124c9
2015-11-02fsl-dce: Handle memory allocation failuresMahammad Ismayilzada
Check for memory allocation failures to protect from null pointer dereferencing Signed-off-by: Mahammad Ismayilzada <mahammad.ismayilzada@freescale.com>
2015-11-02fsl-dce: Correct error paths and add new labelsMahammad Ismayilzada
Correct the order of existing goto labels and add new ones to handle error paths properly for inflation process Signed-off-by: Mahammad Ismayilzada <mahammad.ismayilzada@freescale.com>
2015-11-02fsl_qbman: null check for lni in qman_ceemt_sp_releaseHaiying Wang
For JIRA issue QLINUX-3837 Signed-off-by: Hemant Agrawal <Hemant@freescale.com> Signed-off-by: Haiying Wang <Haiying.wang@freescale.com>
2015-11-02fmd: fix locks in ModifyKey functionMandy Lavi
Fixing an issue that occurs when there are two root ccnodes and both of them point to the same miss ccnode Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com>
2015-11-02fmd: support aging in CCMandy Lavi
Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com>
2015-11-02pci/layerscape: Do not check link statusMinghuan Lian
The PCIe controller should be fully initialized in spite of link status controller and the designware driver will check it before accessing the PCIe device. So we do not need to check link status and the patch removed the related code. Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com>
2015-10-26Revert "gianfar: Add dma transfer endian property support"Claudiu Manoil
This reverts commit 20af0dc3a4003cdfaaac974dfe131e030b857dcd. Revert this non-upstreamable patch (DMACTRL[LE] hack) from SDK1.9, to sync gianfar with following usptream u-boot fix: git.denx.de/?p=u-boot/u-boot-arm.git/ commit: ebe4c1e6469444753bd2ba93fe63e6183cf2905c (“ls102xa: etsec: Use proper settings for BE BDs”). Details about the fix are documented by this uboot commit. Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
2015-10-23kconfig-asf : asf_qos disabled with asf by defaultAlok Makhariya
asf_qos feature to be only available for non-dpaa platform asf_qos will not be enabled by enabling ASF. asf_linux_qos may be used for dpaa platforms. Signed-off-by: Alok Makhariya <B46187@freescale.com>
2015-10-21dpaa_eth: fix bpool seeding for advanced driversMadalin Bucur
On 32 bit kernels using size_t truncated the 40 bit addresses. Signed-off-by: Madalin Bucur <madalin.bucur@freescale.com>
2015-10-21net, gianfar, rt: Update TX_TIMEOUT to 5HZAbhimanyu
Increased TX_TIMEOUT to 5HZ to improve performance in case of Real-Time. Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Abhimanyu <abhimanyu@freescale.com>
2015-10-14fmd: fix policer spelling issuesMandy Lavi
Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com>
2015-10-14fmd: Remove FM_PORT_PcdPrsModifyStartOffset routine - not supportedMandy Lavi
Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com>
2015-10-13fsl_qbman: enable sending cscn to dcp for old qman revisionHaiying Wang
Set CSCN_TARG with correct DCP portal in qman_create_cgr_to_dcp() funciton for the qman revision < qman_3.0 JIRA issue# QLINUX-3814 Signed-off-by: Haiying Wang <Haiying.wang@freescale.com>
2015-09-24dpaa_eth: Add a configurable dpa_tx callCamelia Groza
Signed-off-by: Camelia Groza <camelia.groza@freescale.com>
2015-09-24mmc: sdhci-of-esdhc: fix compile error on ARM platformYangbo Lu
Fix two compile errors below, error: implicit declaration of function 'of_iomap' error: implicit declaration of function 'out_be32' Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
2015-09-24QorIQ/TMU: add thermal management support based on TMUJia Hongtao
It supports one critical trip point and one passive trip point. The cpufreq is used as the cooling device to throttle CPUs when the passive trip is crossed. Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com>
2015-09-24thermal: fix cpu_cooling max_level behaviorEduardo Valentin
As per Documentation/thermal/sysfs-api.txt, max_level is an index, not a counter. Thus, in case a CPU has 3 valid frequencies, max_level is expected to be 2, for instance. The current code makes max_level == number of valid frequencies, which is bogus. This patch fix the cpu_cooling device by ranging max_level properly. Reported-by: Carlos Hernandez <ceh@ti.com> Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com> Signed-off-by: Zhang Rui <rui.zhang@intel.com>
2015-09-24mmc: sdhci-of-esdhc: add SDR50 mode support for SD/MMC Legacy Adapter CardYangbo Lu
The eSDHC is not compatible with SD spec well, so we need to use eSDHC-specific code to switch to SDR50 mode. 1. IO signal voltage switching, eSDHC uses SDHC_VS to switch io voltage and it's needed to configure a global utilities register SCFG_SDHCIOVSELCR(if it has) and SDHC_VS signal. 2. Before executing tuning procedure, eSDHC should set its own tuning block. static const struct sdhci_ops sdhci_esdhc_ops = { ... .set_tuning_block = esdhc_set_tuning_block, .signal_voltage_switch = esdhc_signal_voltage_switch, }; Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
2015-09-24mmc: esdhc: add eMMC45 Adapter Card HS200 mode supportYangbo Lu
The eSDHC is not compatible with SD spec well, it's needed to add callbacks for signal voltage switching and tuning block setting for eSDHC for eMMC45 Adapter Card HS200 mode support. Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
2015-07-20Merge branch 'qoriq-sdk' into LS1-SDK-Rev2.0jason
2015-07-09crypto: caam - fix SEC ERA readingAlex Porosanu
In order to ensure that the SEC ERA property is properly read from DTS, of_property_read* functions need to be used. Signed-off-by: Alex Porosanu <alexandru.porosanu@freescale.com> Signed-off-by: Horia Geantă <horia.geanta@freescale.com> Change-Id: I3fe958ca9b0ab91c2dbd089d1b2f090042cc3fd0 Reviewed-on: http://git.am.freescale.net:8181/39374 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2015-07-09crypto: caam - fix snooping for write transactionsHoria Geantă
HW coherency won't work properly for CAAM write transactions if AWCACHE is left to default (POR) value - 4'b0001. It has to be programmed to 4'b0010. For platforms that have HW coherency support: -PPC-based: the update has no effect; CAAM coherency already works due to the IOMMU (PAMU) driver setting the correct memory coherency attributes -ARM-based: the update fixes cache coherency issues, since IOMMU (SMMU) driver is not programmed to behave similar to PAMU Change-Id: I1f91a526c0bdf28b799d19cab9599b115cad55b3 Signed-off-by: Horia Geantă <horia.geanta@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/39256 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com> Tested-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2015-06-16QE/HDLC: modify QE-HDLC for both ARM and POWERPCZhao Qiang
ls1021 support QE IP block and it is arm, So modify QE-HDLC code to adapt bothe arm and powerpc Signed-off-by: Zhao Qiang <B45475@freescale.com> Change-Id: I9e02e53ae1fafffeec3bf7145309002db19c2dc1 Reviewed-on: http://git.am.freescale.net:8181/38130 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Dongsheng Wang <dongsheng.wang@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2015-06-16Test patch: Enable CAN SoC level loopbackBhupesh Sharma
This patch enables the SoC level CAN loopback. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Change-Id: I5efd40f5d853d11b2476b2bbab0db66c7b1711fa Reviewed-on: http://git.am.freescale.net:8181/38097 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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