Age | Commit message (Collapse) | Author |
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Signed-off-by: Zhao Qiang <B45475@freescale.com>
Change-Id: Id21f861ffec995ad68378a9d2eda245ef989b489
Reviewed-on: http://git.am.freescale.net:8181/19009
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Xiaobo Xie <X.Xie@freescale.com>
Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
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qe-hdlc worked in internal-loopback without TDMR ds26522,
now it can work with TDMR ds26522 in normal mode,
so modify it to normal mode.
Signed-off-by: Zhao Qiang <B45475@freescale.com>
Change-Id: I7eeb4ec196d74cb53f3bffced0889637c72ed5d6
Reviewed-on: http://git.am.freescale.net:8181/19008
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Xiaobo Xie <X.Xie@freescale.com>
Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
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pq_mds_t1 card need 1 bit delay for qe-tdm,
while others doesn't need.
Signed-off-by: Zhao Qiang <B45475@freescale.com>
Change-Id: I80e3e4c83206b292023e6ecb24867b6cb3b5984f
Reviewed-on: http://git.am.freescale.net:8181/19001
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Xiaobo Xie <X.Xie@freescale.com>
Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
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add driver for maxim ds26522
Signed-off-by: Zhao Qiang <B45475@freescale.com>
Change-Id: Icc4076540b5a72efa47778b52a7d455038ba2b99
Reviewed-on: http://git.am.freescale.net:8181/18999
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Xiaobo Xie <X.Xie@freescale.com>
Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
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In FMan v3, special transmission queues, called recycle queues, were created
because it was believed that the FCO flag from the FD is not enough to
differentiate between frames that are recyclable and those who are not. The
frame queue flags were used to signal the BMI to release the buffers back to
the default buffer pool.
The last findings and FMan improvements permit recycling activation only by
using FD fields. With this patch, the recycling frame queues are not needed
anymore.
This patch also removes the code dependency on the FMan version and improves
TCP traffic in forwarding scenarios due to single transmission queues, reducing
the out-of-order segments.
Signed-off-by: Marian Rotariu <marian.rotariu@freescale.com>
Change-Id: Idd4fea4ef7883563df67cf21dea9e87435b2dee8
Reviewed-on: http://git.am.freescale.net:8181/16872
Reviewed-by: Madalin-Cristian Bucur <madalin.bucur@freescale.com>
Tested-by: Madalin-Cristian Bucur <madalin.bucur@freescale.com>
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.resume
Signed-off-by: Eyal Harari <Eyal.Harari@freesacle.com>
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Commit bfa709b (cpufreq: ppc-corenet-cpufreq: Fix __udivdi3 modpost
error) used the remainder from do_div instead of the quotient. Fix that
and add one to ensure minimum is met.
Fixes: bfa709b (cpufreq: ppc-corenet-cpufreq: Fix __udivdi3 modpost error)
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Cc: 3.15+ <stable@vger.kernel.org> # 3.15+
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Zhang Zhuoyu <Zhuoyu.Zhang@freescale.com>
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Signed-off-by: Eyal Harari <Eyal.Harari@freesacle.com>
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Signed-off-by: Eyal Harari <Eyal.Harari@freesacle.com>
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auto_res_snmp_entry
Signed-off-by: Eyal Harari <Eyal.Harari@freesacle.com>
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LAG is hacking bond_3ad_xmit_xor() with Freescale PCD.
Original xmit policy is calculated by CPU and software,
after hacking, this part is replaced with FMan Keygen
hashing to instead.
This patch is fixing an errors on missing readunlock()
after called readlock() while hacking.
Signed-off-by: Jianhua Xie <jianhua.xie@freescale.com>
Change-Id: Ieffe4b340c83e6f2d6f20fd01124eaf1865c81a5
Reviewed-on: http://git.am.freescale.net:8181/17717
Reviewed-by: Honghua Yin <Hong-Hua.Yin@freescale.com>
Reviewed-by: Chenhui Zhao <chenhui.zhao@freescale.com>
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Signed-off-by: Eyal Harari <Eyal.Harari@freesacle.com>
Change-Id: I8b02d8538c564fb2deb849a2053c5a6b82661fc6
Reviewed-on: http://git.am.freescale.net:8181/17192
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Mandy Lavi <Mandy.Lavi@freescale.com>
Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
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1. Correct FM_PCD_KgSchemeDelete() error in LAG:
In FMD UM, at the chapter Frame Manager PCD Runtime Unit API,
FM_PCD_KgSchemeDelete() is told to be run at run-time, and
FM_PCD_KgSchemeDelete() is allowed only following FM_PCD_Init()
& FM_PCD_KgSchemeSet(). But in HW LAG test codes, even follows
FM_PCD_Init() & FM_PCD_KgSchemeSet(), this API reports errors:
cpu3/3: ! MINOR FM-PCD Error [CPU03,
drivers/net/ethernet/freescale/fman/Peripherals/FM/Pcd/fm_kg.c:983
InvalidateSchemeSw]: Invalid State;
cpu3/3: Trying to delete a scheme that has ports bound tocpu3/3:
cpu3/3: ! MINOR FM-PCD Error [CPU03,
drivers/net/ethernet/freescale/fman/Peripherals/FM/Pcd/fm_kg.c:3046
FM_PCD_KgSchemeDelete]: Invalid State;
cpu3/3: cpu3/3:
KgSchemeDelete(h_Schemes[0]) = c00000002e4c0038 Err.
In order to simply the HW LAG codes, and get rid of this error,
insert FM_PORT_DeletePCD() before FM_PCD_KgSchemeDelete().
2. Adjust multiple schemes order with FM_PCD_KgSchemeSet:
To ensure distribution order, adjust multiple schemes order,
please refer to the chapter "The dist_order Element" of FMCTUG.
Change-Id: I4aeef84e796b624d8625db48c0c3098bf9f81abd
Signed-off-by: Jianhua Xie <jianhua.xie@freescale.com>
Reviewed-on: http://git.am.freescale.net:8181/14202
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Jiafei Pan <Jiafei.Pan@freescale.com>
Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
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Add a flag to avoid re-allocation PCD memory for HW LAG.
Without this patch, old codes can introduce memory leak
when call alloc_pcd_mem() in HW LAG.
Change-Id: I92065867c8a2e8ea8315f4cd0de1b3ec99c512e7
Signed-off-by: Jianhua Xie <jianhua.xie@freescale.com>
Reviewed-on: http://git.am.freescale.net:8181/14201
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Jiafei Pan <Jiafei.Pan@freescale.com>
Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
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fix wrong memset parameters for PCD Extract field
ethernet.dst.
Signed-off-by: Jianhua Xie <jianhua.xie@freescale.com>
Change-Id: I8f240ccce2743f1d4da7825e7cfaf0894e5fa33d
Reviewed-on: http://git.am.freescale.net:8181/14200
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Jiafei Pan <Jiafei.Pan@freescale.com>
Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
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Old codes were helping to fill parser result only
when FMan calculated CSUM. This patch is helping
FMan to fill parser result no matter whether FMan
calculates CSUM or not.
Signed-off-by: Jianhua Xie <jianhua.xie@freescale.com>
Change-Id: I812f78a4b8f40dec3ef4d36e2624f4e140995112
Reviewed-on: http://git.am.freescale.net:8181/13581
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Jiafei Pan <Jiafei.Pan@freescale.com>
Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
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fix unfit debug description, add caller source.
Signed-off-by: Jianhua Xie <jianhua.xie@freescale.com>
Change-Id: I9266df0244ba7fb3918b1bfbbd89fc54f7d97175
Reviewed-on: http://git.am.freescale.net:8181/13580
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Jiafei Pan <Jiafei.Pan@freescale.com>
Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
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Signed-off-by: Eyal Harari <Eyal.Harari@freesacle.com>
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Signed-off-by: Eyal Harari <Eyal.Harari@freesacle.com>
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The current sequence fixes the order of operations executed
when entering deep sleep state.
It also implements a workaround for a hardware bug by writing
to fm_cld register - disabling DMA after a short idle period.
Signed-off-by: Eyal Harari <Eyal.Harari@freesacle.com>
Change-Id: I2c73406543495dad5a7fb240a2e8fab01b81e05e
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Due to external constraints (modules loading order and registry
configuration order in Auto Response mode) we need to implement
suspend/resume instead of suspend_noirq/resume_noirq callbacks.
Signed-off-by: Cristian Sovaiala <cristian.sovaiala@freescale.com>
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Macless is a type of generic DPAA driver that does not know its immediate
underlying HW block on TX. It can be connected with an OH port, a TX port,
directly with another Macless driver in Macless-Macless scenario or with
another HW module.
Because not all HW modules know how to calculate CSUM, Macless triggers
software computation of the CSUM. If another HW block modifies the frame it
needs to trigger the Parser to recalculate CSUM.
This patch adds different default values for the parse results structure
that forbids the Parser from doing CSUM validation or computation. The _DTC and
_RPD flags inside the Frame Descriptor are enabled together. This is the only
way to deactivate HW CSUM in all the flows.
Signed-off-by: Marian Rotariu <marian.rotariu@freescale.com>
Change-Id: I6f2e27825f082c9319ff44241d19b06bda3faf47
Reviewed-on: http://git.am.freescale.net:8181/13671
Reviewed-by: Cristian-Constantin Sovaiala <Cristian.Sovaiala@freescale.com>
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Madalin-Cristian Bucur <madalin.bucur@freescale.com>
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Remove unused local variable and unnecessary CGR function calls. Macless does
not use CGR capabilities or specific port fqs.
Signed-off-by: Marian Rotariu <marian.rotariu@freescale.com>
Change-Id: I13ac2037266948a22ab16606bd65e9e965d9aa32
Reviewed-on: http://git.am.freescale.net:8181/13672
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Cristian-Constantin Sovaiala <Cristian.Sovaiala@freescale.com>
Reviewed-by: Madalin-Cristian Bucur <madalin.bucur@freescale.com>
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In unidirectional flows, like UDP, generated by kernel through onic driver, the
traffic can block because of numerous frames that are in HW and not released
fast enough by the driver.
This patch adds a timer that releases frames periodically, regardless of the
reception and transmission rates.
This mechanism was chosen instead of the workqueue mechanism because of its
higher priority, larger than RX and TX procedures.
Change-Id: I141fcb7c2857a726e5e3954cabefb923c8ac0aac
Signed-off-by: Marian Rotariu <marian.rotariu@freescale.com>
Reviewed-on: http://git.am.freescale.net:8181/13569
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Madalin-Cristian Bucur <madalin.bucur@freescale.com>
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According to Spec 2.0, command complete interrupt will be generate
within 150 SD-CLK. But this was not long enough for T1040 board.
So add quirk SDHCI_QUIRK2_LONG_TIME_CMD_COMPLETE_IRQ
to enlarge this detect time to avoid hardware timeout error.
Signed-off-by: Wujie Qiu <B49553@freescale.com>
Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Change-Id: Ia850b3fb707824c65f57511943ec0c91f78d9899
Reviewed-on: http://git.am.freescale.net:8181/13438
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Xiaobo Xie <X.Xie@freescale.com>
Reviewed-by: Zhenhua Luo <zhenhua.luo@freescale.com>
Tested-by: Zhenhua Luo <zhenhua.luo@freescale.com>
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This will enable increasing the total allowed fifo-size
to more than 120KB for FManV1 parts (up to 160KB)
for the purpose of better traffic performance in case
that jumbo frames are involved
Change-Id: I3e357e08656af7d4f6c7e1c071212ccc81825449
Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com>
Reviewed-on: http://git.am.freescale.net:8181/13297
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Nir Erez <nir.erez@freescale.com>
Reviewed-by: Thomas Trefny <Tom.Trefny@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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Add debug option to divert traffic received on one DPAA interface
directly to another DPAA interface. By default this option is disabled.
When enabled special debugfs entries appear for each DPAA interface
that allow changing the divert state from disabled (-1) to enabled by
writing the Tx interface number in them.
Signed-off-by: Madalin Bucur <madalin.bucur@freescale.com>
Change-Id: I7c92d074980dadef55077e43616cb3caa2787838
Reviewed-on: http://git.am.freescale.net:8181/13043
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Cristian-Constantin Sovaiala <Cristian.Sovaiala@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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The draining function will be executed when each CPU has added more than 8
buffers in the draining pool. In some conditions, the sock buffers waits for
the Ethernet driver to release the buffer in order to continue its
transmission.
To avoid memory depletion in the sock buffers, the Ethernet driver will release
faster the received skb from the stack.
This patch makes onic to call the drain procedure on RX path also even if there
is only one buffer in the bpool.
Change-Id: I19f800bbd17c23fda5739b7613fab3da355c6fbc
Signed-off-by: Marian Rotariu <marian.rotariu@freescale.com>
Reviewed-on: http://git.am.freescale.net:8181/13095
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Bogdan Hamciuc <bogdan.hamciuc@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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Signed-off-by: Eyal Harari <Eyal.Harari@freesacle.com>
Change-Id: If804bfb9694ad08330e7a7c083cec9970ad4954d
Reviewed-on: http://git.am.freescale.net:8181/13062
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Mandy Lavi <Mandy.Lavi@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com>
Change-Id: I5ef4f9bd5f0cb1d9b43d8bcc4ac7b1efb3b0bd38
Reviewed-on: http://git.am.freescale.net:8181/12856
Reviewed-by: Nir Erez <nir.erez@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
Tested-by: Jose Rivera <German.Rivera@freescale.com>
(cherry picked from commit 39967816be45a10552e25ec27e2d20de0a466534)
Reviewed-on: http://git.am.freescale.net:8181/13060
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This fixes the problem that if at a time, a path between a keygen and
a CCtable is broken (e.g. by deleting an entry in a previous table)
then it is impossible to add any entry in that table or in any tables
that are "behind" it until a new path would be created
Also fixing the case w.r.t. to share CC nodes when
deleting entry in a CC node attached to first port will corrupt
context of ccnode shared with other ports.
Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com>
Change-Id: I089982acee71c489b6ed9275b641afa74315c18f
Reviewed-on: http://git.am.freescale.net:8181/12820
Reviewed-by: Nir Erez <nir.erez@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
Tested-by: Jose Rivera <German.Rivera@freescale.com>
(cherry picked from commit e25a50bbcd56f0c1f4a725b70eab5f75604d14a3)
Reviewed-on: http://git.am.freescale.net:8181/13059
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Signed-off-by: Eyal Harari <Eyal.Harari@freesacle.com>
Change-Id: Ica2eaeb13ecd0a2ad3084ad427a3e2f2da86b21f
Reviewed-on: http://git.am.freescale.net:8181/13019
Reviewed-by: Mandy Lavi <Mandy.Lavi@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
Tested-by: Jose Rivera <German.Rivera@freescale.com>
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started_ar_enter variable is defined inside CONFIG_PM so
guard the variable all over it is referenced.
Signed-off-by: Cristian Sovaiala <cristian.sovaiala@freescale.com>
Change-Id: I3a9ea33b20c947909689f63fddd8152f5f38c9f9
Reviewed-on: http://git.am.freescale.net:8181/13010
Reviewed-by: Eyal Harari <Eyal.Harari@freescale.com>
Reviewed-by: Cristian Bercaru <cristian.bercaru@freescale.com>
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Madalin-Cristian Bucur <madalin.bucur@freescale.com>
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Signed-off-by: Eyal Harari <Eyal.Harari@freesacle.com>
Change-Id: I90e7e97c9ff8a149893c8244cb0e8376c66eb2ad
Reviewed-on: http://git.am.freescale.net:8181/12925
Reviewed-by: Cristian-Constantin Sovaiala <Cristian.Sovaiala@freescale.com>
Tested-by: Richard Schmitt <richard.schmitt@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
Tested-by: Jose Rivera <German.Rivera@freescale.com>
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bfa709bc823fc32ee8dd5220d1711b46078235d8 (cpufreq: powerpc: add cpufreq
transition latency for FSL e500mc SoCs) introduced a modpost error:
ERROR: "__udivdi3" [drivers/cpufreq/ppc-corenet-cpufreq.ko] undefined!
make[1]: *** [__modpost] Error 1
Fix this by avoiding 64 bit integer division.
gcc version 4.8.2
Fixes: bfa709bc823f (cpufreq: powerpc: add cpufreq transition latency for FSL e500mc SoCs)
Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Zhang Zhuoyu <Zhuoyu.Zhang@freescale.com>
Change-Id: I234b1b4b298f8821204093a76eab4ba78d04a55d
Reviewed-on: http://git.am.freescale.net:8181/12859
Reviewed-by: Yuantian Tang <yuantian.tang@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
Tested-by: Jose Rivera <German.Rivera@freescale.com>
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On 32-bit, "12 * NSEC_PER_SEC" doesn't fit in "unsigned long"
(NSEC_PER_SEC is a "long" constant), causing an integer overflow:
drivers/cpufreq/ppc-corenet-cpufreq.c: In function 'corenet_cpufreq_cpu_init':
drivers/cpufreq/ppc-corenet-cpufreq.c:211:9: warning: integer overflow in expression [-Woverflow]
Force the intermediate to be 64-bit by adding an "ULL" suffix to the
constant multiplier to fix this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Zhang Zhuoyu <Zhuoyu.Zhang@freescale.com>
Change-Id: I488325db883101c51df1df8a8ffbaf955683432f
Reviewed-on: http://git.am.freescale.net:8181/12858
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Yuantian Tang <yuantian.tang@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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In order to check whether the card has been removed, the function
mmc_send_status() will send command CMD13 to card and ask the card
to send its status register to sdhc driver, which will generate
many interrupts repeatedly and make the system performance bad.
From the performance test on Freescale's board (such as Iozone for SD),
the performance will degrade about 4~6%.
There is one another way to get this information,
which is to read the register PRSSTAT and check the bit CDPL or CINS.
If the card is present, these two bit will set to one.
Therefore, add callback function get_cd() to check whether
the card has been inserted/removed when the driver supports this feature.
If the card is present, 0 will return, if the card is absent, 1 will return.
If the controller will not support this feature, -ENOSYS will return.
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
Change-Id: I5ef39890637727c0120bea7497421b5ccd99f346
Reviewed-on: http://git.am.freescale.net:8181/12879
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Yang Li <LeoLi@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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The APIs are implemented in FMD so no need to have this check in
place.
Signed-off-by: Cristian Sovaiala <cristian.sovaiala@freescale.com>
Change-Id: Ia69b55b0f77600459ef211c624ff46cdbf1479e1
Reviewed-on: http://git.am.freescale.net:8181/12871
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Madalin-Cristian Bucur <madalin.bucur@freescale.com>
Reviewed-by: Eyal Harari <Eyal.Harari@freescale.com>
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For QMan version 3.1.2 the DCE Channel number is different.
QMan contains a cfg revision number which is a direct correlation.
Add this attribute and fix up the dce channel number based on qman revision info.
Signed-off-by: Jeffrey Ladouceur <Jeffrey.Ladouceur@freescale.com>
Change-Id: I0ff79ec01f741fb71caf0a9d4f0a9f3760d64f15
Reviewed-on: http://git.am.freescale.net:8181/12851
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Haiying Wang <Haiying.Wang@freescale.com>
Reviewed-by: Geoff Thorpe <Geoff.Thorpe@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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T1042 will trigger an Machine Check Exception when clearing the EPU
registers in resume process. The cause is that the sequence of clearing
the EPU registers is critical to make things right, especiallly
for T1042.
Therefore, follow the exact sequence in RM to clear the EPU registers.
Change-Id: Icec8b3fd37b0e122801c19eede81592000abb5f5
Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com>
Reviewed-on: http://git.am.freescale.net:8181/12784
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Dongsheng Wang <dongsheng.wang@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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Interrupt mode for t1040RDB is working. Enable it to
avoid redundant poling mode.
Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
Change-Id: I686faa7c763758815f7c6146670ab4061a76a63d
Reviewed-on: http://git.am.freescale.net:8181/12830
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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This reverts commit a2b468f094846bca51c49c28c071accb46a18daa.
Change-Id: If862fe836cf057ec254aab4c45c2091071cfd996
Reviewed-on: http://git.am.freescale.net:8181/12827
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
Tested-by: Jose Rivera <German.Rivera@freescale.com>
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The IPSec general statistics were displayed incorrectly on B4 and T
platforms because in kernel compatibility mode (32bit user space apps
combined with 64bit kernel) the DPA_IPSEC_IOC_GET_STATS message
processing was not updated with the support for multiple IPSec
instances.
Signed-off-by: Marian Chereji <marian.chereji@freescale.com>
Change-Id: I694324154ee70b9f54bdf941dfe78aa42f77823b
Reviewed-on: http://git.am.freescale.net:8181/12781
Reviewed-by: Ioana Tibuleac <ioana.tibuleac@freescale.com>
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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Add support for EON en25s64 spi device.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Change-Id: Ia16f275a272c0fa338d7c22d1b3bc95897c7ba28
Reviewed-on: http://git.am.freescale.net:8181/12664
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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TDM can either use an external (on-board) oscillator or use
platform clock as source. On the boards which do not have an
external clock enable TDM to use internal clock.
Signed-off-by: Sandeep Singh <sandeep@freescale.com>
Change-Id: Ic07aa8c419bb2fa4f61db17195638acf4914df0a
Reviewed-on: http://git.am.freescale.net:8181/12415
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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The tty atomic_write_lock does not provide an exclusion guarantee for
the tty driver if the termios settings are LECHO & !OPOST. And since
it is unexpected and not allowed to call TTY buffer helpers like
tty_insert_flip_string concurrently, this may lead to crashes when
concurrect writers call pty_write. In that case the following two
writers:
* the ECHOing from a workqueue and
* pty_write from the process
race and can overflow the corresponding TTY buffer like follows.
If we look into tty_insert_flip_string_fixed_flag, there is:
int space = __tty_buffer_request_room(port, goal, flags);
struct tty_buffer *tb = port->buf.tail;
...
memcpy(char_buf_ptr(tb, tb->used), chars, space);
...
tb->used += space;
so the race of the two can result in something like this:
A B
__tty_buffer_request_room
__tty_buffer_request_room
memcpy(buf(tb->used), ...)
tb->used += space;
memcpy(buf(tb->used), ...) ->BOOM
B's memcpy is past the tty_buffer due to the previous A's tb->used
increment.
Since the N_TTY line discipline input processing can output
concurrently with a tty write, obtain the N_TTY ldisc output_lock to
serialize echo output with normal tty writes. This ensures the tty
buffer helper tty_insert_flip_string is not called concurrently and
everything is fine.
Note that this is nicely reproducible by an ordinary user using
forkpty and some setup around that (raw termios + ECHO). And it is
present in kernels at least after commit
d945cb9cce20ac7143c2de8d88b187f62db99bdc (pty: Rework the pty layer to
use the normal buffering logic) in 2.6.31-rc3.
js: add more info to the commit log
js: switch to bool
js: lock unconditionally
js: lock only the tty->ops->write call
References: CVE-2014-0196
Reported-and-tested-by: Jiri Slaby <jslaby@suse.cz>
Signed-off-by: Peter Hurley <peter@hurleysoftware.com>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc: <stable@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 4291086b1f081b869c6d79e5b7441633dc3ace00)
Signed-off-by: Scott Wood <scottwood@freescale.com>
Change-Id: Ia026d31182516be7ff8e70017422a3522cfeb425
Reviewed-on: http://git.am.freescale.net:8181/12529
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Yusong Sun <yorksun@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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The DPAA jumbo frames optimizations do not depend anymore on the FMan
dynamic resource allocation algorithm and are available on all
platforms.
Signed-off-by: Cristian Bercaru <cristian.bercaru@freescale.com>
Change-Id: Ia270d0aeba9801d67fa401bae4215ab1f25040fe
Reviewed-on: http://git.am.freescale.net:8181/12501
Reviewed-by: Mandy Lavi <Mandy.Lavi@freescale.com>
Reviewed-by: Madalin-Cristian Bucur <madalin.bucur@freescale.com>
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Cristian-Constantin Sovaiala <Cristian.Sovaiala@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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Add following affected SOCs and their variants
P1010 rev2.0
B4860 rev1.0 rev2.0 rev2.1 rev2.2
T2080 rev1.0
T2081 rev1.0
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Change-Id: I954877e5b878abf63667b0215aa41a8a3a93eddf
Reviewed-on: http://git.am.freescale.net:8181/12743
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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12*NSEC_PER_SEC will overflow on 32-bit OS. Besides, The transition latency
is "12 internal platform clocks", rounding errors might lead to a result that
it is shorter than 12 platform clocks which is not we expected.
Signed-off-by: Zhang Zhuoyu <Zhuoyu.Zhang@freescale.com>
Change-Id: Ic8627f70abb70e964abdec0a5b4d86aa15833a7d
Reviewed-on: http://git.am.freescale.net:8181/12555
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Yuantian Tang <yuantian.tang@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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