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/*
* P1023/P1017 Silicon/SoC Device Tree Source (post include)
*
* Copyright 2011-2012 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of Freescale Semiconductor nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
*
* ALTERNATIVELY, this software may be distributed under the terms of the
* GNU General Public License ("GPL") as published by the Free Software
* Foundation, either version 2 of that License or (at your option) any
* later version.
*
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
&lbc {
#address-cells = <2>;
#size-cells = <1>;
compatible = "fsl,p1023-elbc", "fsl,elbc", "simple-bus";
interrupts = <19 2 0 0>;
};
/* controller at 0xa000 */
&pci0 {
compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2";
device_type = "pci";
#size-cells = <2>;
#address-cells = <3>;
bus-range = <0x0 0xff>;
clock-frequency = <33333333>;
interrupts = <16 2 0 0>;
pcie@0 {
reg = <0 0 0 0 0>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
device_type = "pci";
interrupts = <16 2 0 0>;
};
};
/* controller at 0x9000 */
&pci1 {
compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2";
device_type = "pci";
#size-cells = <2>;
#address-cells = <3>;
bus-range = <0 0xff>;
clock-frequency = <33333333>;
interrupts = <16 2 0 0>;
pcie@0 {
reg = <0 0 0 0 0>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
device_type = "pci";
interrupts = <16 2 0 0>;
};
};
/* controller at 0xb000 */
&pci2 {
compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2";
device_type = "pci";
#size-cells = <2>;
#address-cells = <3>;
bus-range = <0x0 0xff>;
clock-frequency = <33333333>;
interrupts = <16 2 0 0>;
pcie@0 {
reg = <0 0 0 0 0>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
device_type = "pci";
interrupts = <16 2 0 0>;
};
};
&qportals {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
qportal0: qman-portal@0 {
cell-index = <0>;
compatible = "fsl,qman-portal";
reg = <0x0 0x4000 0x100000 0x1000>;
interrupts = <29 2 0 0>;
fsl,qman-channel-id = <0>;
};
qportal1: qman-portal@4000 {
cell-index = <1>;
compatible = "fsl,qman-portal";
reg = <0x4000 0x4000 0x101000 0x1000>;
interrupts = <31 2 0 0>;
fsl,qman-channel-id = <1>;
};
qportal2: qman-portal@8000 {
cell-index = <2>;
compatible = "fsl,qman-portal";
reg = <0x8000 0x4000 0x102000 0x1000>;
interrupts = <33 2 0 0>;
fsl,qman-channel-id = <2>;
};
};
&bportals {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
bman-portal@0 {
cell-index = <0>;
compatible = "fsl,bman-portal";
reg = <0x0 0x4000 0x100000 0x1000>;
interrupts = <30 2 0 0>;
};
bman-portal@4000 {
cell-index = <1>;
compatible = "fsl,bman-portal";
reg = <0x4000 0x4000 0x101000 0x1000>;
interrupts = <32 2 0 0>;
};
bman-portal@8000 {
cell-index = <2>;
compatible = "fsl,bman-portal";
reg = <0x8000 0x4000 0x102000 0x1000>;
interrupts = <34 2 0 0>;
};
};
&soc {
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
compatible = "fsl,p1023-immr", "simple-bus";
bus-frequency = <0>; // Filled out by uboot.
ecm-law@0 {
compatible = "fsl,ecm-law";
reg = <0x0 0x1000>;
fsl,num-laws = <12>;
};
ecm@1000 {
compatible = "fsl,p1023-ecm", "fsl,ecm";
reg = <0x1000 0x1000>;
interrupts = <16 2 0 0>;
};
memory-controller@2000 {
compatible = "fsl,p1023-memory-controller";
reg = <0x2000 0x1000>;
interrupts = <16 2 0 0>;
};
/include/ "pq3-i2c-0.dtsi"
/include/ "pq3-i2c-1.dtsi"
/include/ "pq3-duart-0.dtsi"
/include/ "pq3-espi-0.dtsi"
spi@7000 {
fsl,espi-num-chipselects = <4>;
};
/include/ "pq3-gpio-0.dtsi"
L2: l2-cache-controller@20000 {
compatible = "fsl,p1023-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <32>; // 32 bytes
cache-size = <0x40000>; // L2,256K
interrupts = <16 2 0 0>;
};
/include/ "pq3-dma-0.dtsi"
/include/ "pq3-usb2-dr-0.dtsi"
usb@22000 {
compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr";
};
crypto: crypto@300000 {
compatible = "fsl,sec-v4.2", "fsl,sec-v4.0";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x30000 0x10000>;
ranges = <0 0x30000 0x10000>;
interrupts = <58 2 0 0>;
sec_jr0: jr@1000 {
compatible = "fsl,sec-v4.2-job-ring",
"fsl,sec-v4.0-job-ring";
reg = <0x1000 0x1000>;
interrupts = <45 2 0 0>;
};
sec_jr1: jr@2000 {
compatible = "fsl,sec-v4.2-job-ring",
"fsl,sec-v4.0-job-ring";
reg = <0x2000 0x1000>;
interrupts = <45 2 0 0>;
};
sec_jr2: jr@3000 {
compatible = "fsl,sec-v4.2-job-ring",
"fsl,sec-v4.0-job-ring";
reg = <0x3000 0x1000>;
interrupts = <57 2 0 0>;
};
sec_jr3: jr@4000 {
compatible = "fsl,sec-v4.2-job-ring",
"fsl,sec-v4.0-job-ring";
reg = <0x4000 0x1000>;
interrupts = <57 2 0 0>;
};
rtic@6000 {
compatible = "fsl,sec-v4.2-rtic",
"fsl,sec-v4.0-rtic";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x6000 0x100>;
ranges = <0x0 0x6100 0xe00>;
rtic_a: rtic-a@0 {
compatible = "fsl,sec-v4.2-rtic-memory",
"fsl,sec-v4.0-rtic-memory";
reg = <0x00 0x20 0x100 0x80>;
};
rtic_b: rtic-b@20 {
compatible = "fsl,sec-v4.2-rtic-memory",
"fsl,sec-v4.0-rtic-memory";
reg = <0x20 0x20 0x200 0x80>;
};
rtic_c: rtic-c@40 {
compatible = "fsl,sec-v4.2-rtic-memory",
"fsl,sec-v4.0-rtic-memory";
reg = <0x40 0x20 0x300 0x80>;
};
rtic_d: rtic-d@60 {
compatible = "fsl,sec-v4.2-rtic-memory",
"fsl,sec-v4.0-rtic-memory";
reg = <0x60 0x20 0x500 0x80>;
};
};
};
/include/ "pq3-mpic.dtsi"
/include/ "pq3-mpic-timer-B.dtsi"
qman: qman@88000 {
compatible = "fsl,qman";
reg = <0x88000 0x1000>;
interrupts = <16 2 0 0>;
};
bman: bman@8a000 {
compatible = "fsl,bman";
reg = <0x8a000 0x1000>;
interrupts = <16 2 0 0>;
};
global-utilities@e0000 {
compatible = "fsl,p1023-guts";
reg = <0xe0000 0x1000>;
fsl,has-rstcr;
};
fman0: fman@100000 {
#address-cells = <1>;
#size-cells = <1>;
cell-index = <0>;
compatible = "fsl,fman", "simple-bus";
ranges = <0 0x100000 0x100000>;
reg = <0x100000 0x100000>;
clock-frequency = <0>;
interrupts = <
24 2 0 0
16 2 0 0>;
cc@0 {
compatible = "fsl,fman-cc";
};
muram@0 {
compatible = "fsl,fman-muram";
reg = <0x0 0x10000>;
};
bmi@80000 {
compatible = "fsl,fman-bmi";
reg = <0x80000 0x400>;
};
qmi@80400 {
compatible = "fsl,fman-qmi";
reg = <0x80400 0x400>;
};
policer@c0000 {
compatible = "fsl,fman-policer";
reg = <0xc0000 0x1000>;
};
keygen@c1000 {
compatible = "fsl,fman-keygen";
reg = <0xc1000 0x1000>;
};
dma@c2000 {
compatible = "fsl,fman-dma";
reg = <0xc2000 0x1000>;
};
fpm@c3000 {
compatible = "fsl,fman-fpm";
reg = <0xc3000 0x1000>;
};
parser@c7000 {
compatible = "fsl,fman-parser";
reg = <0xc7000 0x1000>;
};
fman0_rx0: port@88000 {
cell-index = <0>;
compatible = "fsl,fman-port-1g-rx";
reg = <0x88000 0x1000>;
};
fman0_rx1: port@89000 {
cell-index = <1>;
compatible = "fsl,fman-port-1g-rx";
reg = <0x89000 0x1000>;
};
fman0_tx0: port@a8000 {
cell-index = <0>;
compatible = "fsl,fman-port-1g-tx";
reg = <0xa8000 0x1000>;
fsl,qman-channel-id = <0x40>;
};
fman0_tx1: port@a9000 {
cell-index = <1>;
compatible = "fsl,fman-port-1g-tx";
reg = <0xa9000 0x1000>;
fsl,qman-channel-id = <0x41>;
};
fman0_oh1: port@82000 {
cell-index = <1>;
compatible = "fsl,fman-port-oh";
reg = <0x82000 0x1000>;
fsl,qman-channel-id = <0x43>;
};
fman0_oh2: port@83000 {
cell-index = <2>;
compatible = "fsl,fman-port-oh";
reg = <0x83000 0x1000>;
fsl,qman-channel-id = <0x44>;
};
fman0_oh3: port@84000 {
cell-index = <3>;
compatible = "fsl,fman-port-oh";
reg = <0x84000 0x1000>;
fsl,qman-channel-id = <0x45>;
};
fman0_oh4: port@85000 {
cell-index = <4>;
compatible = "fsl,fman-port-oh";
reg = <0x85000 0x1000>;
fsl,qman-channel-id = <0x46>;
};
enet0: ethernet@e0000 {
cell-index = <0>;
compatible = "fsl,fman-1g-mac";
reg = <0xe0000 0x1000>;
fsl,port-handles = <&fman0_rx0 &fman0_tx0>;
ptimer-handle = <&ptp_timer0>;
};
enet1: ethernet@e2000 {
cell-index = <1>;
compatible = "fsl,fman-1g-mac";
reg = <0xe2000 0x1000>;
fsl,port-handles = <&fman0_rx1 &fman0_tx1>;
ptimer-handle = <&ptp_timer0>;
};
mdio0: mdio@e1120 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,fman-mdio";
reg = <0xe1120 0xee0>;
interrupts = <26 1 0 0>;
};
ptp_timer0: rtc@fe000 {
compatible = "fsl,fman-rtc";
reg = <0xfe000 0x1000>;
};
};
};
|