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/*
* P1021 RDB Core0 Device Tree Source in CAMP mode.
*
* Copyright 2011 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of Freescale Semiconductor nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
*
* ALTERNATIVELY, this software may be distributed under the terms of the
* GNU General Public License ("GPL") as published by the Free Software
* Foundation, either version 2 of that License or (at your option) any
* later version.
*
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
* can be shared, all the other devices must be assigned to one core only.
* This dts file allows core0 to have memory, l2, serail0, i2c, spi, gpio,
* tdm, dma, usb, eth0, eth1, sdhc, crypto, global-util, message, pci0, pci1,
* msi.
*
* Please note to add "-b 0" for core0's dts compiling.
*/
/include/ "p1021rdb.dts"
/ {
model = "fsl,P1021RDB";
compatible = "fsl,P1021RDB-PC";
aliases {
ethernet1 = &enet0;
ethernet2 = &enet1;
serial0 = &serial0;
pci0 = &pci0;
pci1 = &pci1;
};
cpus {
PowerPC,P1021@1 {
status = "disabled";
};
};
memory {
device_type = "memory";
};
soc@ffe00000 {
serial1: serial@4600 {
status = "disabled";
};
mdio@24000 {
phy1: ethernet-phy@1 {
status = "disabled";
};
};
enet2: ethernet@b2000 {
status = "disabled";
};
mpic: pic@40000 {
protected-sources = <
42 /* serial1 */
31 32 33 /* enet2-queue-group0 */
25 26 27 /* enet2-queue-group1 */
>;
pic-no-reset;
};
};
};
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