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/*
* P1023 RDS Device Tree Source
*
* Copyright 2010-2012 Freescale Semiconductor Inc.
*
* Author: Roy Zang <tie-fei.zang@freescale.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of Freescale Semiconductor nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
*
* ALTERNATIVELY, this software may be distributed under the terms of the
* GNU General Public License ("GPL") as published by the Free Software
* Foundation, either version 2 of that License or (at your option) any
* later version.
*
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/include/ "fsl/p1023si-pre.dtsi"
/ {
model = "fsl,P1023";
compatible = "fsl,P1023RDS";
#address-cells = <2>;
#size-cells = <2>;
interrupt-parent = <&mpic>;
aliases {
ethernet0 = &enet0;
ethernet1 = &enet1;
};
memory {
device_type = "memory";
};
qportals: qman-portals@ff000000 {
ranges = <0x0 0xf 0xff000000 0x200000>;
};
bportals: bman-portals@ff200000 {
ranges = <0x0 0xf 0xff200000 0x200000>;
};
soc: soc@ff600000 {
ranges = <0x0 0x0 0xff600000 0x200000>;
i2c@3000 {
rtc@68 {
compatible = "dallas,ds1374";
reg = <0x68>;
};
};
spi@7000 {
fsl_dataflash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "atmel,at45db081d";
reg = <0>;
spi-max-frequency = <40000000>; /* input clock */
partition@u-boot {
/* 512KB for u-boot Bootloader Image */
label = "u-boot-spi";
reg = <0x00000000 0x00080000>;
read-only;
};
partition@dtb {
/* 512KB for DTB Image */
label = "dtb-spi";
reg = <0x00080000 0x00080000>;
read-only;
};
};
};
usb@22000 {
dr_mode = "host";
phy_type = "ulpi";
};
fman0: fman@100000 {
enet0: ethernet@e0000 {
phy-handle = <&phy0>;
phy-connection-type = "rgmii";
};
enet1: ethernet@e2000 {
phy-handle = <&phy1>;
phy-connection-type = "rgmii";
};
mdio0: mdio@e1120 {
phy0: ethernet-phy@2 {
reg = <0x02>;
};
phy1: ethernet-phy@7 {
reg = <0x07>;
};
};
};
};
lbc: localbus@ff605000 {
reg = <0 0xff605000 0 0x1000>;
/* NOR Flash, BCSR */
ranges = <0x0 0x0 0x0 0xee000000 0x02000000
0x1 0x0 0x0 0xe0000000 0x00008000>;
nor@0,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
reg = <0x0 0x0 0x02000000>;
bank-width = <2>;
device-width = <1>;
partition@0 {
label = "ramdisk";
reg = <0x00000000 0x01c00000>;
};
partition@1c00000 {
label = "kernel";
reg = <0x01c00000 0x002e0000>;
};
partiton@1ee0000 {
label = "dtb";
reg = <0x01ee0000 0x00020000>;
};
partition@1f00000 {
label = "firmware";
reg = <0x01f00000 0x00080000>;
read-only;
};
partition@1f80000 {
label = "u-boot";
reg = <0x01f80000 0x00080000>;
read-only;
};
};
fpga@1,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,p1023rds-fpga";
reg = <1 0 0x8000>;
ranges = <0 1 0 0x8000>;
bcsr@20 {
compatible = "fsl,p1023rds-bcsr";
reg = <0x20 0x20>;
};
};
};
pci0: pcie@ff60a000 {
reg = <0 0xff60a000 0 0x1000>;
ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
pcie@0 {
/* IRQ[0:3] are pulled up on board, set to active-low */
interrupt-map-mask = <0xf800 0 0 7>;
interrupt-map = <
/* IDSEL 0x0 */
0000 0 0 1 &mpic 0 1 0 0
0000 0 0 2 &mpic 1 1 0 0
0000 0 0 3 &mpic 2 1 0 0
0000 0 0 4 &mpic 3 1 0 0
>;
ranges = <0x2000000 0x0 0xc0000000
0x2000000 0x0 0xc0000000
0x0 0x20000000
0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
};
board_pci1: pci1: pcie@ff609000 {
reg = <0 0xff609000 0 0x1000>;
ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
pcie@0 {
/*
* IRQ[4:6] only for PCIe, set to active-high,
* IRQ[7] is pulled up on board, set to active-low
*/
interrupt-map-mask = <0xf800 0 0 7>;
interrupt-map = <
/* IDSEL 0x0 */
0000 0 0 1 &mpic 4 2 0 0
0000 0 0 2 &mpic 5 2 0 0
0000 0 0 3 &mpic 6 2 0 0
0000 0 0 4 &mpic 7 1 0 0
>;
ranges = <0x2000000 0x0 0xa0000000
0x2000000 0x0 0xa0000000
0x0 0x20000000
0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
};
pci2: pcie@ff60b000 {
reg = <0 0xff60b000 0 0x1000>;
ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
pcie@0 {
/*
* IRQ[8:10] are pulled up on board, set to active-low
* IRQ[11] only for PCIe, set to active-high,
*/
interrupt-map-mask = <0xf800 0 0 7>;
interrupt-map = <
/* IDSEL 0x0 */
0000 0 0 1 &mpic 8 1 0 0
0000 0 0 2 &mpic 9 1 0 0
0000 0 0 3 &mpic 10 1 0 0
0000 0 0 4 &mpic 11 2 0 0
>;
ranges = <0x2000000 0x0 0x80000000
0x2000000 0x0 0x80000000
0x0 0x20000000
0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
};
fsl,dpaa {
compatible = "fsl,p1023-dpaa", "fsl,dpaa";
ethernet@0 {
compatible = "fsl,p1023-dpa-ethernet", "fsl,dpa-ethernet";
fsl,fman-mac = <&enet0>;
};
ethernet@1 {
compatible = "fsl,p1023-dpa-ethernet", "fsl,dpa-ethernet";
fsl,fman-mac = <&enet1>;
};
};
};
/include/ "fsl/p1023si-post.dtsi"
/include/ "fsl/qoriq-dpaa-res2.dtsi"
|
