1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387
1388
1389
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436
1437
1438
1439
1440
1441
1442
1443
1444
1445
1446
1447
1448
1449
1450
1451
1452
1453
1454
1455
1456
1457
1458
1459
1460
1461
1462
1463
1464
1465
1466
1467
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477
1478
1479
1480
1481
1482
1483
1484
1485
1486
1487
1488
1489
1490
1491
1492
1493
1494
1495
1496
1497
1498
1499
1500
1501
1502
1503
1504
1505
1506
1507
1508
1509
1510
1511
1512
1513
1514
1515
1516
1517
1518
1519
1520
1521
1522
1523
1524
1525
1526
1527
1528
1529
1530
1531
1532
1533
1534
1535
1536
1537
1538
1539
1540
1541
1542
1543
1544
1545
1546
1547
1548
1549
1550
1551
1552
1553
1554
1555
1556
1557
1558
1559
1560
1561
1562
1563
1564
1565
1566
1567
1568
1569
1570
1571
1572
1573
1574
1575
1576
1577
1578
1579
1580
1581
1582
1583
1584
1585
1586
1587
1588
1589
1590
1591
1592
1593
1594
1595
1596
1597
1598
1599
1600
1601
1602
1603
1604
1605
1606
1607
1608
1609
1610
1611
1612
1613
1614
1615
1616
1617
1618
1619
1620
1621
1622
1623
1624
1625
1626
1627
1628
1629
1630
1631
1632
1633
1634
1635
1636
1637
1638
1639
1640
1641
1642
1643
1644
1645
1646
1647
1648
1649
1650
1651
1652
1653
1654
1655
1656
1657
1658
1659
1660
1661
1662
1663
1664
1665
1666
1667
1668
1669
1670
1671
1672
1673
1674
1675
1676
1677
1678
1679
1680
1681
1682
1683
1684
1685
1686
1687
1688
1689
1690
1691
1692
1693
1694
1695
1696
1697
1698
1699
1700
1701
1702
1703
1704
1705
1706
1707
1708
1709
1710
1711
1712
1713
1714
1715
1716
1717
1718
1719
1720
1721
1722
1723
1724
1725
1726
1727
1728
1729
1730
1731
1732
1733
1734
1735
1736
1737
1738
1739
1740
1741
1742
1743
1744
1745
1746
1747
1748
1749
1750
1751
1752
1753
1754
1755
1756
1757
1758
1759
1760
1761
1762
1763
1764
1765
1766
1767
1768
1769
1770
1771
1772
1773
1774
1775
1776
1777
1778
1779
1780
1781
1782
1783
1784
1785
1786
1787
1788
1789
1790
1791
1792
1793
1794
1795
1796
1797
1798
1799
1800
1801
1802
1803
1804
1805
1806
1807
1808
1809
1810
1811
1812
1813
1814
1815
1816
1817
1818
1819
1820
1821
1822
1823
1824
1825
1826
1827
1828
1829
1830
1831
1832
1833
1834
1835
1836
1837
1838
1839
1840
1841
1842
1843
1844
1845
1846
1847
1848
1849
1850
1851
1852
1853
1854
1855
1856
1857
1858
1859
1860
1861
1862
1863
1864
1865
1866
1867
1868
1869
1870
1871
1872
1873
1874
1875
1876
1877
1878
1879
1880
1881
1882
1883
1884
1885
1886
1887
1888
1889
1890
1891
1892
1893
1894
1895
1896
1897
1898
1899
1900
1901
1902
1903
1904
1905
1906
1907
1908
1909
1910
1911
1912
1913
1914
1915
1916
1917
1918
1919
1920
1921
1922
1923
1924
1925
1926
1927
1928
1929
1930
1931
1932
1933
1934
1935
1936
1937
1938
1939
1940
1941
1942
1943
1944
1945
1946
1947
1948
1949
1950
1951
1952
1953
1954
1955
1956
1957
1958
1959
1960
1961
1962
1963
1964
1965
1966
1967
1968
1969
1970
1971
1972
1973
1974
1975
1976
1977
1978
1979
1980
1981
1982
1983
1984
1985
1986
1987
1988
1989
1990
1991
1992
1993
1994
1995
1996
1997
1998
1999
2000
2001
2002
2003
2004
2005
2006
2007
2008
2009
2010
2011
2012
2013
2014
2015
2016
2017
2018
2019
2020
2021
2022
2023
2024
2025
2026
2027
2028
2029
2030
2031
2032
2033
2034
2035
2036
2037
2038
2039
2040
2041
2042
2043
2044
2045
2046
2047
2048
2049
2050
2051
2052
2053
2054
2055
2056
2057
2058
2059
2060
2061
2062
2063
2064
2065
2066
2067
2068
2069
2070
2071
2072
2073
2074
2075
2076
2077
2078
2079
2080
2081
2082
2083
2084
2085
2086
2087
2088
2089
2090
2091
2092
2093
2094
2095
2096
2097
2098
2099
2100
2101
2102
2103
2104
2105
2106
2107
2108
2109
2110
2111
2112
2113
2114
2115
2116
2117
2118
2119
2120
2121
2122
2123
2124
2125
2126
2127
2128
2129
2130
2131
2132
2133
2134
2135
2136
2137
2138
2139
2140
2141
2142
2143
2144
2145
2146
2147
2148
2149
2150
2151
2152
2153
2154
2155
2156
2157
2158
2159
2160
2161
2162
2163
2164
2165
2166
2167
2168
2169
2170
2171
2172
2173
2174
2175
2176
2177
2178
2179
2180
2181
2182
2183
2184
2185
2186
2187
2188
2189
2190
2191
2192
2193
2194
2195
2196
2197
2198
2199
2200
2201
2202
2203
2204
2205
2206
2207
2208
2209
2210
2211
2212
2213
2214
2215
2216
2217
2218
2219
2220
2221
2222
2223
2224
2225
2226
2227
2228
2229
2230
2231
2232
2233
2234
2235
2236
2237
2238
2239
2240
2241
2242
2243
2244
2245
2246
2247
2248
2249
2250
2251
2252
2253
2254
2255
2256
2257
2258
2259
2260
2261
2262
2263
2264
2265
2266
2267
2268
2269
2270
2271
2272
2273
2274
2275
2276
2277
2278
2279
2280
2281
2282
2283
2284
2285
2286
2287
2288
2289
2290
2291
2292
2293
2294
2295
2296
2297
2298
2299
2300
2301
2302
2303
2304
2305
2306
2307
2308
2309
2310
2311
2312
2313
2314
2315
2316
2317
2318
2319
2320
2321
2322
2323
2324
2325
2326
2327
2328
2329
2330
2331
2332
2333
2334
2335
2336
2337
2338
2339
2340
2341
2342
2343
2344
2345
2346
2347
2348
2349
2350
2351
2352
2353
2354
2355
2356
2357
2358
2359
2360
2361
2362
2363
2364
2365
2366
2367
2368
2369
2370
2371
2372
2373
2374
2375
2376
2377
2378
2379
2380
2381
2382
2383
2384
2385
2386
2387
2388
2389
2390
2391
2392
2393
2394
2395
2396
2397
2398
2399
2400
2401
2402
2403
2404
2405
2406
2407
2408
2409
2410
2411
2412
2413
2414
2415
2416
2417
2418
2419
2420
2421
2422
2423
2424
2425
2426
2427
2428
2429
2430
2431
2432
2433
2434
2435
2436
2437
2438
2439
2440
2441
2442
2443
2444
2445
2446
2447
2448
2449
2450
2451
2452
2453
2454
2455
2456
2457
2458
2459
2460
2461
2462
2463
2464
2465
2466
2467
2468
2469
2470
2471
2472
2473
2474
2475
2476
2477
2478
2479
2480
2481
2482
2483
2484
2485
2486
2487
2488
2489
2490
2491
2492
2493
2494
2495
2496
2497
2498
2499
2500
2501
2502
2503
2504
2505
2506
2507
2508
2509
2510
2511
2512
2513
2514
2515
2516
2517
2518
2519
2520
2521
2522
2523
2524
2525
2526
2527
2528
2529
2530
2531
2532
2533
2534
2535
2536
2537
2538
2539
2540
2541
2542
2543
2544
2545
2546
2547
2548
2549
2550
2551
2552
2553
2554
2555
2556
2557
2558
2559
2560
2561
2562
2563
2564
2565
2566
2567
2568
2569
2570
2571
2572
2573
2574
2575
2576
2577
2578
2579
2580
2581
2582
2583
2584
2585
2586
2587
2588
2589
2590
2591
2592
2593
2594
2595
2596
2597
2598
2599
2600
2601
2602
2603
2604
2605
2606
2607
2608
2609
2610
2611
2612
2613
2614
2615
2616
2617
2618
2619
2620
2621
2622
2623
2624
2625
2626
2627
2628
2629
2630
2631
2632
2633
2634
2635
2636
2637
2638
2639
2640
2641
2642
2643
2644
2645
2646
2647
2648
2649
2650
2651
2652
2653
2654
2655
2656
2657
2658
2659
2660
2661
2662
2663
2664
2665
2666
2667
2668
2669
2670
2671
2672
2673
2674
2675
2676
2677
2678
2679
2680
2681
2682
2683
2684
2685
2686
2687
2688
2689
2690
2691
2692
2693
2694
2695
2696
2697
2698
2699
2700
2701
2702
2703
2704
2705
2706
2707
2708
2709
2710
2711
2712
2713
2714
2715
2716
2717
2718
2719
2720
2721
2722
2723
2724
2725
2726
2727
2728
2729
2730
2731
2732
2733
2734
2735
2736
2737
2738
2739
2740
2741
2742
2743
2744
2745
2746
2747
2748
2749
2750
2751
2752
2753
2754
2755
2756
2757
2758
2759
2760
2761
2762
2763
2764
2765
2766
2767
2768
2769
2770
2771
2772
2773
2774
2775
2776
2777
2778
2779
2780
2781
2782
2783
2784
2785
2786
2787
2788
2789
2790
2791
2792
2793
2794
2795
2796
2797
2798
2799
2800
2801
2802
2803
2804
2805
2806
2807
2808
2809
2810
2811
2812
2813
2814
2815
2816
2817
2818
2819
2820
2821
2822
2823
2824
2825
2826
2827
2828
2829
2830
2831
2832
2833
2834
2835
2836
2837
2838
2839
2840
2841
2842
2843
2844
2845
2846
2847
2848
2849
2850
2851
2852
2853
2854
2855
2856
2857
2858
2859
2860
2861
2862
2863
2864
2865
2866
2867
2868
2869
2870
2871
2872
2873
2874
2875
2876
2877
2878
2879
2880
2881
2882
2883
2884
2885
2886
2887
2888
2889
2890
2891
2892
2893
2894
2895
2896
2897
2898
2899
2900
2901
2902
2903
2904
2905
2906
2907
2908
2909
2910
2911
2912
2913
2914
2915
2916
2917
2918
2919
2920
2921
2922
2923
2924
2925
2926
2927
2928
2929
2930
2931
2932
2933
2934
2935
2936
2937
2938
2939
2940
2941
2942
2943
2944
2945
2946
2947
2948
2949
2950
2951
2952
2953
2954
2955
2956
2957
2958
2959
2960
2961
2962
2963
2964
2965
2966
2967
2968
2969
2970
2971
2972
2973
2974
2975
2976
2977
2978
2979
2980
2981
2982
2983
2984
2985
2986
2987
2988
2989
2990
2991
2992
2993
2994
2995
2996
2997
2998
2999
3000
3001
3002
3003
3004
3005
3006
3007
3008
3009
3010
3011
3012
3013
3014
3015
3016
3017
3018
3019
3020
3021
3022
3023
3024
3025
3026
3027
3028
3029
3030
3031
3032
3033
3034
3035
3036
3037
3038
3039
3040
3041
3042
3043
3044
3045
3046
3047
3048
3049
3050
3051
3052
3053
3054
3055
3056
3057
3058
3059
3060
3061
3062
3063
3064
3065
3066
3067
3068
3069
3070
3071
3072
3073
3074
3075
3076
3077
3078
3079
3080
3081
3082
3083
3084
3085
3086
3087
3088
3089
3090
3091
3092
3093
3094
3095
3096
3097
3098
3099
3100
3101
3102
3103
3104
3105
3106
3107
3108
3109
3110
3111
3112
3113
3114
3115
3116
3117
3118
3119
3120
3121
3122
3123
3124
3125
3126
3127
3128
3129
3130
3131
3132
3133
3134
3135
3136
3137
3138
3139
3140
3141
3142
3143
3144
3145
3146
3147
3148
3149
3150
3151
3152
3153
3154
3155
3156
3157
3158
3159
3160
3161
3162
3163
3164
3165
3166
3167
3168
3169
3170
3171
3172
3173
3174
3175
3176
3177
3178
3179
3180
3181
3182
3183
3184
3185
3186
3187
3188
3189
3190
3191
3192
3193
3194
3195
3196
3197
3198
3199
3200
3201
3202
3203
3204
3205
3206
3207
3208
3209
3210
3211
3212
3213
3214
3215
3216
3217
3218
3219
3220
3221
3222
3223
3224
3225
3226
3227
3228
3229
3230
3231
3232
3233
3234
3235
3236
3237
3238
3239
3240
3241
3242
3243
3244
3245
3246
3247
3248
3249
3250
3251
3252
3253
3254
3255
3256
3257
3258
3259
3260
3261
3262
3263
3264
3265
3266
3267
3268
3269
3270
3271
3272
3273
3274
3275
3276
3277
3278
3279
3280
3281
3282
3283
3284
3285
3286
3287
3288
3289
3290
3291
3292
3293
3294
3295
3296
3297
3298
3299
3300
3301
3302
3303
3304
3305
3306
3307
3308
3309
3310
3311
3312
3313
3314
3315
3316
3317
3318
3319
3320
3321
3322
3323
3324
3325
3326
3327
3328
3329
3330
3331
3332
3333
3334
3335
3336
3337
3338
3339
3340
3341
3342
3343
3344
3345
3346
3347
3348
3349
3350
3351
3352
3353
3354
3355
3356
3357
3358
3359
3360
3361
3362
|
/*
* Copyright 2008-2013 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of Freescale Semiconductor nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
*
* ALTERNATIVELY, this software may be distributed under the terms of the
* GNU General Public License ("GPL") as published by the Free Software
* Foundation, either version 2 of that License or (at your option) any
* later version.
*
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#define pr_fmt(fmt) \
KBUILD_MODNAME ": %s:%hu:%s() " fmt, \
KBUILD_BASENAME".c", __LINE__, __func__
#include <linux/init.h>
#include <linux/module.h>
#include <linux/sort.h>
#include <linux/of_mdio.h>
#include <linux/of_platform.h>
#include <linux/of_net.h>
#include <linux/kthread.h>
#include <linux/io.h>
#include <linux/etherdevice.h>
#include <linux/if_arp.h> /* arp_hdr_len() */
#include <linux/if_vlan.h> /* VLAN_HLEN */
#include <linux/icmp.h> /* struct icmphdr */
#include <linux/ip.h> /* struct iphdr */
#include <linux/ipv6.h> /* struct ipv6hdr */
#include <linux/udp.h> /* struct udphdr */
#include <linux/tcp.h> /* struct tcphdr */
#include <linux/net.h> /* net_ratelimit() */
#include <linux/net_tstamp.h> /* struct hwtstamp_config */
#include <linux/if_ether.h> /* ETH_P_IP and ETH_P_IPV6 */
#include <linux/highmem.h>
#include <linux/percpu.h>
#include <linux/dma-mapping.h>
#include <asm/smp.h> /* get_hard_smp_processor_id() */
#include <linux/fsl_bman.h>
#include "fsl_fman.h"
#include "fm_ext.h"
#include "fm_port_ext.h"
#include "mac.h"
#include "dpaa_eth.h"
#include "dpaa_1588.h"
#ifdef CONFIG_FSL_DPAA_ETH_DEBUGFS
#include "dpaa_debugfs.h"
#endif /* CONFIG_FSL_DPAA_ETH_DEBUGFS */
#ifdef CONFIG_FSL_DPAA_ETH_UNIT_TESTS
#include "dpaa_eth_unit_test.h"
#endif /* CONFIG_FSL_DPAA_ETH_UNIT_TESTS */
/* CREATE_TRACE_POINTS only needs to be defined once. Other dpa files
* using trace events only need to #include <trace/events/sched.h>
*/
#define CREATE_TRACE_POINTS
#include "dpaa_eth_trace.h"
#define ARRAY2_SIZE(arr) (ARRAY_SIZE(arr) * ARRAY_SIZE((arr)[0]))
/* DPAA platforms benefit from hardware-assisted queue management */
#ifdef CONFIG_AS_FASTPATH
#define DPA_NETIF_FEATURES (NETIF_F_HW_QDISC | NETIF_F_HW_ACCEL_MQ)
#else
#define DPA_NETIF_FEATURES NETIF_F_HW_ACCEL_MQ
#endif
#define DPA_NAPI_WEIGHT 64
/* Size in bytes of the Congestion State notification threshold on 10G ports */
#define DPA_CS_THRESHOLD_10G 0x10000000
/*
* Size in bytes of the Congestion State notification threshold on 1G ports.
* The 1G dTSECs can quite easily be flooded by cores doing Tx in a tight loop
* (e.g. by sending UDP datagrams at "while(1) speed"),
* and the larger the frame size, the more acute the problem.
*
* So we have to find a balance between these factors:
* - avoiding the device staying congested for a prolonged time (risking
* the netdev watchdog to fire - see also the tx_timeout module param);
* - affecting performance of protocols such as TCP, which otherwise
* behave well under the congestion notification mechanism;
* - preventing the Tx cores from tightly-looping (as if the congestion
* threshold was too low to be effective);
* - running out of memory if the CS threshold is set too high.
*/
#define DPA_CS_THRESHOLD_1G 0x06000000
/* Size in bytes of the FQ taildrop threshold */
#define DPA_FQ_TD 0x200000
/* S/G table requires at least 256 bytes */
#define sgt_buffer_size(priv) \
dpa_get_buffer_size(&priv->buf_layout[TX], 256)
/* Maximum frame size on Tx for which skb copying is preferrable to
* creating a S/G frame */
#define DPA_SKB_COPY_MAX_SIZE 256
/* Valid checksum indication */
#define DPA_CSUM_VALID 0xFFFF
/* Maximum offset value for a contig or sg FD (represented on 9bits) */
#define DPA_MAX_FD_OFFSET ((1 << 9) - 1)
/*
* Extra size of a buffer (beyond the size of the buffers that are seeded into
* the global pool) for which recycling is allowed.
* The value is arbitrary, but tries to reach a balance such that originating
* frames may get recycled, while forwarded skbs that get reallocated on Tx
* aren't allowed to grow unboundedly.
*/
#define DPA_RECYCLE_EXTRA_SIZE 1024
#define DPA_DESCRIPTION "FSL DPAA Ethernet driver"
MODULE_LICENSE("Dual BSD/GPL");
MODULE_AUTHOR("Andy Fleming <afleming@freescale.com>");
MODULE_DESCRIPTION(DPA_DESCRIPTION);
static uint8_t debug = -1;
module_param(debug, byte, S_IRUGO);
MODULE_PARM_DESC(debug, "Module/Driver verbosity level");
/* This has to work in tandem with the DPA_CS_THRESHOLD_xxx values. */
static uint16_t tx_timeout = 1000;
module_param(tx_timeout, ushort, S_IRUGO);
MODULE_PARM_DESC(tx_timeout, "The Tx timeout in ms");
/* dpaa_eth mirror for the FMan values */
static int dpa_rx_extra_headroom;
int dpa_max_frm;
static const char rtx[][3] = {
[RX] = "RX",
[TX] = "TX"
};
#if defined(CONFIG_FSL_FMAN_TEST)
/* Defined as weak, to be implemented by fman pcd tester. */
int dpa_alloc_pcd_fqids(struct device *, uint32_t, uint8_t, uint32_t *)
__attribute__((weak));
int dpa_free_pcd_fqids(struct device *, uint32_t) __attribute__((weak));
#endif /* CONFIG_FSL_DPAA_FMAN_UNIT_TESTS */
/* BM */
#define DPAA_ETH_MAX_PAD (L1_CACHE_BYTES * 8)
static struct dpa_bp *dpa_bp_array[64];
static struct dpa_bp *default_pool;
static bool default_pool_seeded;
static uint32_t default_buf_size;
/* A set of callbacks for hooking into the fastpath at different points. */
static struct dpaa_eth_hooks_s dpaa_eth_hooks;
/*
* This function should only be called on the probe paths, since it makes no
* effort to guarantee consistency of the destination hooks structure.
*/
void fsl_dpaa_eth_set_hooks(struct dpaa_eth_hooks_s *hooks)
{
if (hooks)
dpaa_eth_hooks = *hooks;
else
pr_err("NULL pointer to hooks!\n");
}
EXPORT_SYMBOL(fsl_dpaa_eth_set_hooks);
struct dpa_bp *dpa_bpid2pool(int bpid)
{
return dpa_bp_array[bpid];
}
static void dpa_bp_depletion(struct bman_portal *portal,
struct bman_pool *pool, void *cb_ctx, int depleted)
{
if (net_ratelimit())
pr_err("Invalid Pool depleted notification!\n");
}
#ifndef CONFIG_FSL_DPAA_ETH_SG_SUPPORT
/* Allocate 8 socket buffers.
* These buffers are counted for a particular CPU.
*/
static void dpa_bp_add_8(const struct dpa_bp *dpa_bp, unsigned int cpu)
{
struct bm_buffer bmb[8];
struct sk_buff **skbh;
dma_addr_t addr;
int i;
struct sk_buff *skb;
int *count_ptr;
count_ptr = per_cpu_ptr(dpa_bp->percpu_count, cpu);
for (i = 0; i < 8; i++) {
/*
* The buffers tend to be aligned all to the same cache
* index. A standard dequeue operation pulls in 15 packets.
* This means that when it stashes, it evicts half of the
* packets it's stashing. In order to prevent that, we pad
* by a variable number of cache lines, to reduce collisions.
* We always pad by at least 1 cache line, because we want
* a little extra room at the beginning for IPSec and to
* accommodate NET_IP_ALIGN.
*/
int pad = (i + 1) * L1_CACHE_BYTES;
skb = dev_alloc_skb(dpa_bp->size + pad);
if (unlikely(!skb)) {
printk(KERN_ERR "dev_alloc_skb() failed\n");
bm_buffer_set64(&bmb[i], 0);
break;
}
skbh = (struct sk_buff **)(skb->head + pad);
*skbh = skb;
/*
* Here we need to map only for device write (DMA_FROM_DEVICE),
* but on Tx recycling we may also get buffers in the pool that
* are mapped bidirectionally.
* Use DMA_BIDIRECTIONAL here as well to avoid any
* inconsistencies when unmapping.
*/
addr = dma_map_single(dpa_bp->dev, skb->head + pad,
dpa_bp->size, DMA_BIDIRECTIONAL);
if (unlikely(dma_mapping_error(dpa_bp->dev, addr))) {
dev_err(dpa_bp->dev, "DMA mapping failed");
break;
}
bm_buffer_set64(&bmb[i], addr);
}
/* Avoid releasing a completely null buffer; bman_release() requires
* at least one buf. */
if (likely(i)) {
/*
* Release the buffers. In case bman is busy, keep trying
* until successful. bman_release() is guaranteed to succeed
* in a reasonable amount of time
*/
while (bman_release(dpa_bp->pool, bmb, i, 0))
cpu_relax();
*count_ptr += i;
}
}
void dpa_make_private_pool(struct dpa_bp *dpa_bp)
{
int i;
dpa_bp->percpu_count = alloc_percpu(*dpa_bp->percpu_count);
/* Give each cpu an allotment of "count" buffers */
for_each_online_cpu(i) {
int j;
for (j = 0; j < dpa_bp->target_count; j += 8)
dpa_bp_add_8(dpa_bp, i);
}
}
#endif /* CONFIG_FSL_DPAA_ETH_SG_SUPPORT */
static void dpaa_eth_seed_pool(struct dpa_bp *bp)
{
int count = bp->target_count;
size_t addr = bp->paddr;
while (count) {
struct bm_buffer bufs[8];
int num_bufs = 0;
do {
BUG_ON(addr > 0xffffffffffffull);
bufs[num_bufs].bpid = bp->bpid;
bm_buffer_set64(&bufs[num_bufs++], addr);
addr += bp->size;
} while (--count && (num_bufs < 8));
while (bman_release(bp->pool, bufs, num_bufs, 0))
cpu_relax();
}
}
/*
* Add buffers/pages/skbuffs for Rx processing whenever bpool count falls below
* REFILL_THRESHOLD.
*/
static void dpaa_eth_refill_bpools(struct dpa_percpu_priv_s *percpu_priv)
{
int *countptr = percpu_priv->dpa_bp_count;
int count = *countptr;
const struct dpa_bp *dpa_bp = percpu_priv->dpa_bp;
#ifndef CONFIG_FSL_DPAA_ETH_SG_SUPPORT
/* this function is called in softirq context;
* no need to protect smp_processor_id() on RT kernel
*/
unsigned int cpu = smp_processor_id();
if (unlikely(count < CONFIG_FSL_DPAA_ETH_REFILL_THRESHOLD)) {
int i;
for (i = count; i < CONFIG_FSL_DPAA_ETH_MAX_BUF_COUNT; i += 8)
dpa_bp_add_8(dpa_bp, cpu);
}
#else
/* Add pages to the buffer pool */
while (count < CONFIG_FSL_DPAA_ETH_MAX_BUF_COUNT)
count += _dpa_bp_add_8_pages(dpa_bp);
*countptr = count;
#endif
}
static int dpa_make_shared_port_pool(struct dpa_bp *bp)
{
/*
* In MAC-less and Shared-MAC scenarios the physical
* address of the buffer pool in device tree is set
* to 0 to specify that another entity (USDPAA) will
* allocate and seed the buffers
*/
if (!bp->paddr)
return 0;
devm_request_mem_region(bp->dev, bp->paddr,
bp->size * bp->config_count, KBUILD_MODNAME);
bp->vaddr = devm_ioremap_prot(bp->dev, bp->paddr,
bp->size * bp->config_count, 0);
if (bp->vaddr == NULL) {
pr_err("Could not map memory for pool %d\n", bp->bpid);
return -EIO;
}
if (bp->seed_pool)
dpaa_eth_seed_pool(bp);
return 0;
}
static int __must_check __attribute__((nonnull))
dpa_bp_alloc(struct dpa_bp *dpa_bp)
{
int err;
struct bman_pool_params bp_params;
struct platform_device *pdev;
BUG_ON(dpa_bp->size == 0);
BUG_ON(dpa_bp->config_count == 0);
bp_params.flags = BMAN_POOL_FLAG_DEPLETION;
bp_params.cb = dpa_bp_depletion;
bp_params.cb_ctx = dpa_bp;
/* We support two options. Either a global shared pool, or
* a specified pool. If the pool is specified, we only
* create one per bpid */
if (dpa_bp->kernel_pool && default_pool) {
atomic_inc(&default_pool->refs);
return 0;
}
if (dpa_bp_array[dpa_bp->bpid]) {
atomic_inc(&dpa_bp_array[dpa_bp->bpid]->refs);
return 0;
}
if (dpa_bp->bpid == 0)
bp_params.flags |= BMAN_POOL_FLAG_DYNAMIC_BPID;
else
bp_params.bpid = dpa_bp->bpid;
dpa_bp->pool = bman_new_pool(&bp_params);
if (unlikely(dpa_bp->pool == NULL)) {
pr_err("bman_new_pool() failed\n");
return -ENODEV;
}
dpa_bp->bpid = bman_get_params(dpa_bp->pool)->bpid;
pdev = platform_device_register_simple("dpaa_eth_bpool",
dpa_bp->bpid, NULL, 0);
if (IS_ERR(pdev)) {
err = PTR_ERR(pdev);
goto pdev_register_failed;
}
err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(40));
if (err)
goto pdev_mask_failed;
dpa_bp->dev = &pdev->dev;
if (dpa_bp->kernel_pool) {
if (!default_pool)
default_pool = dpa_bp;
} else {
err = dpa_make_shared_port_pool(dpa_bp);
if (err)
goto make_shared_pool_failed;
}
dpa_bp_array[dpa_bp->bpid] = dpa_bp;
atomic_set(&dpa_bp->refs, 1);
return 0;
make_shared_pool_failed:
pdev_mask_failed:
platform_device_unregister(pdev);
pdev_register_failed:
bman_free_pool(dpa_bp->pool);
return err;
}
#ifndef CONFIG_FSL_DPAA_ETH_SG_SUPPORT
static inline void _dpa_bp_free_buf(void *addr)
{
struct sk_buff **skbh = addr;
struct sk_buff *skb;
skb = *skbh;
dev_kfree_skb_any(skb);
}
#else
static inline void _dpa_bp_free_buf(void *addr)
{
free_page((unsigned long)addr);
}
#endif
static void __cold __attribute__((nonnull))
_dpa_bp_free(struct dpa_bp *dpa_bp)
{
struct dpa_bp *bp = dpa_bpid2pool(dpa_bp->bpid);
if (!atomic_dec_and_test(&bp->refs))
return;
if (bp->kernel_pool) {
int num;
do {
struct bm_buffer bmb[8];
int i;
num = bman_acquire(bp->pool, bmb, 8, 0);
for (i = 0; i < num; i++) {
dma_addr_t addr = bm_buf_addr(&bmb[i]);
dma_unmap_single(bp->dev, addr, bp->size,
DMA_BIDIRECTIONAL);
_dpa_bp_free_buf(phys_to_virt(addr));
}
} while (num == 8);
}
dpa_bp_array[bp->bpid] = 0;
bman_free_pool(bp->pool);
}
void __cold __attribute__((nonnull))
dpa_bp_free(struct dpa_priv_s *priv, struct dpa_bp *dpa_bp)
{
int i;
for (i = 0; i < priv->bp_count; i++)
_dpa_bp_free(&priv->dpa_bp[i]);
}
/* QM */
static struct qman_fq *_dpa_get_tx_conf_queue(const struct dpa_priv_s *priv,
struct qman_fq *tx_fq)
{
int i;
for (i = 0; i < DPAA_ETH_TX_QUEUES; i++)
if (priv->egress_fqs[i] == tx_fq)
return priv->conf_fqs[i];
return NULL;
}
int dpa_fq_init(struct dpa_fq *dpa_fq, bool td_enable)
{
int _errno;
const struct dpa_priv_s *priv;
struct device *dev;
struct qman_fq *fq;
struct qm_mcc_initfq initfq;
struct qman_fq *confq;
priv = netdev_priv(dpa_fq->net_dev);
dev = dpa_fq->net_dev->dev.parent;
if (dpa_fq->fqid == 0)
dpa_fq->flags |= QMAN_FQ_FLAG_DYNAMIC_FQID;
dpa_fq->init = !(dpa_fq->flags & QMAN_FQ_FLAG_NO_MODIFY);
_errno = qman_create_fq(dpa_fq->fqid, dpa_fq->flags, &dpa_fq->fq_base);
if (_errno) {
dev_err(dev, "qman_create_fq() failed\n");
return _errno;
}
fq = &dpa_fq->fq_base;
if (dpa_fq->init) {
initfq.we_mask = QM_INITFQ_WE_FQCTRL;
/* FIXME: why would we want to keep an empty FQ in cache? */
initfq.fqd.fq_ctrl = QM_FQCTRL_PREFERINCACHE;
#ifdef CONFIG_FSL_DPAA_ETH_SG_SUPPORT
/* Try to reduce the number of portal interrupts for
* Tx Confirmation FQs.
*/
if (dpa_fq->fq_type == FQ_TYPE_TX_CONFIRM)
initfq.fqd.fq_ctrl |= QM_FQCTRL_HOLDACTIVE;
#endif
/* FQ placement */
initfq.we_mask |= QM_INITFQ_WE_DESTWQ;
initfq.fqd.dest.channel = dpa_fq->channel;
initfq.fqd.dest.wq = dpa_fq->wq;
/*
* Put all egress queues in a congestion group of their own.
* Sensu stricto, the Tx confirmation queues are Rx FQs,
* rather than Tx - but they nonetheless account for the
* memory footprint on behalf of egress traffic. We therefore
* place them in the netdev's CGR, along with the Tx FQs.
*/
if (dpa_fq->fq_type == FQ_TYPE_TX ||
dpa_fq->fq_type == FQ_TYPE_TX_CONFIRM ||
dpa_fq->fq_type == FQ_TYPE_TX_CONF_MQ) {
initfq.we_mask |= QM_INITFQ_WE_CGID;
initfq.fqd.fq_ctrl |= QM_FQCTRL_CGE;
initfq.fqd.cgid = priv->cgr_data.cgr.cgrid;
/*
* Set a fixed overhead accounting, in an attempt to
* reduce the impact of fixed-size skb shells and the
* driver's needed headroom on system memory. This is
* especially the case when the egress traffic is
* composed of small datagrams.
* Unfortunately, QMan's OAL value is capped to an
* insufficient value, but even that is better than
* no overhead accounting at all.
*/
initfq.we_mask |= QM_INITFQ_WE_OAC;
initfq.fqd.oac_init.oac = QM_OAC_CG;
initfq.fqd.oac_init.oal = min(sizeof(struct sk_buff) +
priv->tx_headroom, (size_t)FSL_QMAN_MAX_OAL);
}
if (td_enable) {
initfq.we_mask |= QM_INITFQ_WE_TDTHRESH;
qm_fqd_taildrop_set(&initfq.fqd.td,
DPA_FQ_TD, 1);
initfq.fqd.fq_ctrl = QM_FQCTRL_TDE;
}
/*
* Configure the Tx confirmation queue, now that we know
* which Tx queue it pairs with.
*/
if (dpa_fq->fq_type == FQ_TYPE_TX) {
confq = _dpa_get_tx_conf_queue(priv, &dpa_fq->fq_base);
if (confq) {
initfq.we_mask |= QM_INITFQ_WE_CONTEXTA |
QM_INITFQ_WE_CONTEXTB;
/* CTXA[OVFQ] = 1 */
initfq.fqd.context_a.hi = 0x80000000;
initfq.fqd.context_a.lo = 0x0;
initfq.fqd.context_b = qman_fq_fqid(confq);
}
}
#ifdef CONFIG_FSL_DPAA_TX_RECYCLE
/*
* Configure the Tx queues for recycled frames, such that the
* buffers are released by FMan and no confirmation is sent
*/
if (dpa_fq->fq_type == FQ_TYPE_TX_RECYCLE) {
initfq.we_mask |= QM_INITFQ_WE_CONTEXTA |
QM_INITFQ_WE_CONTEXTB;
/*
* ContextA: OVFQ=1 (use ContextB FQID for confirmation)
* OVOM=1 (use contextA2 bits instead of ICAD)
* A2V=1 (contextA A2 field is valid)
* B0V=1 (contextB field is valid)
* ContextA A2: EBD=1 (deallocate buffers inside FMan)
* ContextB: Confirmation FQID = 0
*/
initfq.fqd.context_a.hi = 0x96000000;
initfq.fqd.context_a.lo = 0x80000000;
initfq.fqd.context_b = 0;
}
#endif
/* Initialization common to all ingress queues */
if (dpa_fq->flags & QMAN_FQ_FLAG_NO_ENQUEUE) {
initfq.we_mask |= QM_INITFQ_WE_CONTEXTA;
initfq.fqd.fq_ctrl |=
QM_FQCTRL_CTXASTASHING | QM_FQCTRL_AVOIDBLOCK;
initfq.fqd.context_a.stashing.exclusive =
QM_STASHING_EXCL_DATA | QM_STASHING_EXCL_CTX |
QM_STASHING_EXCL_ANNOTATION;
initfq.fqd.context_a.stashing.data_cl = 2;
initfq.fqd.context_a.stashing.annotation_cl = 1;
initfq.fqd.context_a.stashing.context_cl =
DIV_ROUND_UP(sizeof(struct qman_fq), 64);
};
_errno = qman_init_fq(fq, QMAN_INITFQ_FLAG_SCHED, &initfq);
if (_errno < 0) {
dev_err(dev, "qman_init_fq(%u) = %d\n",
qman_fq_fqid(fq), _errno);
qman_destroy_fq(fq, 0);
return _errno;
}
}
dpa_fq->fqid = qman_fq_fqid(fq);
return 0;
}
static int __cold __attribute__((nonnull))
_dpa_fq_free(struct device *dev, struct qman_fq *fq)
{
int _errno, __errno;
struct dpa_fq *dpa_fq;
const struct dpa_priv_s *priv;
_errno = 0;
dpa_fq = container_of(fq, struct dpa_fq, fq_base);
priv = netdev_priv(dpa_fq->net_dev);
if (dpa_fq->init) {
_errno = qman_retire_fq(fq, NULL);
if (unlikely(_errno < 0) && netif_msg_drv(priv))
dev_err(dev, "qman_retire_fq(%u) = %d\n",
qman_fq_fqid(fq), _errno);
__errno = qman_oos_fq(fq);
if (unlikely(__errno < 0) && netif_msg_drv(priv)) {
dev_err(dev, "qman_oos_fq(%u) = %d\n",
qman_fq_fqid(fq), __errno);
if (_errno >= 0)
_errno = __errno;
}
}
qman_destroy_fq(fq, 0);
list_del(&dpa_fq->list);
return _errno;
}
int __cold __attribute__((nonnull))
dpa_fq_free(struct device *dev, struct list_head *list)
{
int _errno, __errno;
struct dpa_fq *dpa_fq, *tmp;
_errno = 0;
list_for_each_entry_safe(dpa_fq, tmp, list, list) {
__errno = _dpa_fq_free(dev, (struct qman_fq *)dpa_fq);
if (unlikely(__errno < 0) && _errno >= 0)
_errno = __errno;
}
return _errno;
}
void dpa_release_sgt(struct qm_sg_entry *sgt, struct bm_buffer *bmb)
{
struct dpa_bp *dpa_bp;
int i = 0, j;
do {
dpa_bp = dpa_bpid2pool(sgt[i].bpid);
BUG_ON(IS_ERR(dpa_bp));
j = 0;
do {
BUG_ON(sgt[i].extension);
bmb[j].hi = sgt[i].addr_hi;
bmb[j].lo = sgt[i].addr_lo;
j++; i++;
} while (j < ARRAY_SIZE(bmb) &&
!sgt[i-1].final &&
sgt[i-1].bpid == sgt[i].bpid);
while (bman_release(dpa_bp->pool, bmb, j, 0))
cpu_relax();
} while (!sgt[i-1].final);
}
void __attribute__((nonnull))
dpa_fd_release(const struct net_device *net_dev, const struct qm_fd *fd)
{
struct qm_sg_entry *sgt;
struct dpa_bp *_dpa_bp;
struct bm_buffer _bmb, bmb[8];
_bmb.hi = fd->addr_hi;
_bmb.lo = fd->addr_lo;
_dpa_bp = dpa_bpid2pool(fd->bpid);
BUG_ON(IS_ERR(_dpa_bp));
if (fd->format == qm_fd_sg) {
sgt = (phys_to_virt(bm_buf_addr(&_bmb)) + dpa_fd_offset(fd));
dpa_release_sgt(sgt, bmb);
}
while (bman_release(_dpa_bp->pool, &_bmb, 1, 0))
cpu_relax();
}
EXPORT_SYMBOL(dpa_fd_release);
#ifndef CONFIG_FSL_DPAA_ETH_SG_SUPPORT
/*
* Cleanup function for outgoing frame descriptors that were built on Tx path,
* either contiguous frames or scatter/gather ones with a single data buffer.
* Skb freeing is not handled here.
*
* This function may be called on error paths in the Tx function, so guard
* against cases when not all fd relevant fields were filled in.
*
* Return the skb backpointer, since for S/G frames the buffer containing it
* gets freed here.
*/
struct sk_buff *_dpa_cleanup_tx_fd(const struct dpa_priv_s *priv,
const struct qm_fd *fd)
{
dma_addr_t addr = qm_fd_addr(fd);
dma_addr_t sg_addr;
void *vaddr;
struct dpa_bp *bp = priv->dpa_bp;
struct sk_buff **skbh;
struct sk_buff *skb = NULL;
BUG_ON(!fd);
if (unlikely(!addr))
return skb;
vaddr = phys_to_virt(addr);
skbh = (struct sk_buff **)vaddr;
if (fd->format == qm_fd_contig) {
/* For contiguous frames, just unmap data buffer;
* mapping direction depends on whether the frame was
* meant to be recycled or not */
if (fd->cmd & FM_FD_CMD_FCO)
dma_unmap_single(bp->dev, addr, bp->size,
DMA_BIDIRECTIONAL);
else
dma_unmap_single(bp->dev, addr, bp->size,
DMA_TO_DEVICE);
/* Retrieve the skb backpointer */
skb = *skbh;
} else {
/* For s/g, we need to unmap both the SGT buffer and the
* data buffer, and also free the SGT buffer */
struct qm_sg_entry *sg_entry;
/* Unmap first buffer (contains S/G table) */
dma_unmap_single(bp->dev, addr, sgt_buffer_size(priv),
DMA_TO_DEVICE);
/* Unmap data buffer */
sg_entry = (struct qm_sg_entry *)(vaddr + fd->offset);
sg_addr = qm_sg_addr(sg_entry);
if (likely(sg_addr))
dma_unmap_single(bp->dev, sg_addr, bp->size,
DMA_TO_DEVICE);
/* Retrieve the skb backpointer */
skb = *skbh;
}
/* on some error paths this might not be necessary: */
#ifdef CONFIG_FSL_DPAA_1588
if (priv->tsu && priv->tsu->valid && priv->tsu->hwts_tx_en_ioctl)
dpa_ptp_store_txstamp(priv, skb, (void *)skbh);
#endif
#ifdef CONFIG_FSL_DPAA_TS
if (unlikely(priv->ts_tx_en &&
skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
struct skb_shared_hwtstamps shhwtstamps;
if (!dpa_get_ts(priv, TX, &shhwtstamps, (void *)skbh))
skb_tstamp_tx(skb, &shhwtstamps);
}
#endif /* CONFIG_FSL_DPAA_TS */
/* Free first buffer (which was allocated on Tx) containing the
* skb backpointer and hardware timestamp information
*/
if (fd->format != qm_fd_contig)
kfree(vaddr);
return skb;
}
#endif /* CONFIG_FSL_DPAA_ETH_SG_SUPPORT */
/* net_device */
/**
* @param net_dev the device for which statistics are calculated
* @param stats the function fills this structure with the device's statistics
* @return the address of the structure containing the statistics
*
* Calculates the statistics for the given device by adding the statistics
* collected by each CPU.
*/
struct rtnl_link_stats64 * __cold
dpa_get_stats64(struct net_device *net_dev,
struct rtnl_link_stats64 *stats)
{
struct dpa_priv_s *priv = netdev_priv(net_dev);
u64 *cpustats;
u64 *netstats = (u64 *)stats;
int i, j;
struct dpa_percpu_priv_s *percpu_priv;
int numstats = sizeof(struct rtnl_link_stats64) / sizeof(u64);
for_each_online_cpu(i) {
percpu_priv = per_cpu_ptr(priv->percpu_priv, i);
cpustats = (u64 *)&percpu_priv->stats;
for (j = 0; j < numstats; j++)
netstats[j] += cpustats[j];
}
return stats;
}
int dpa_change_mtu(struct net_device *net_dev, int new_mtu)
{
const int max_mtu = dpa_get_max_mtu();
const int min_mtu = dpa_get_min_mtu();
/* Make sure we don't exceed the Ethernet controller's MAXFRM */
if (new_mtu < min_mtu || new_mtu > max_mtu) {
netdev_err(net_dev, "Invalid L3 mtu %d "
"(must be between %d and %d).\n",
new_mtu, min_mtu, max_mtu);
return -EINVAL;
}
net_dev->mtu = new_mtu;
return 0;
}
/* .ndo_init callback */
int dpa_ndo_init(struct net_device *net_dev)
{
/*
* If fsl_fm_max_frm is set to a higher value than the all-common 1500,
* we choose conservatively and let the user explicitly set a higher
* MTU via ifconfig. Otherwise, the user may end up with different MTUs
* in the same LAN.
* If on the other hand fsl_fm_max_frm has been chosen below 1500,
* start with the maximum allowed.
*/
int init_mtu = min(dpa_get_max_mtu(), ETH_DATA_LEN);
pr_debug("Setting initial MTU on net device: %d\n", init_mtu);
net_dev->mtu = init_mtu;
return 0;
}
int dpa_set_mac_address(struct net_device *net_dev, void *addr)
{
const struct dpa_priv_s *priv;
int _errno;
struct mac_device *mac_dev;
priv = netdev_priv(net_dev);
_errno = eth_mac_addr(net_dev, addr);
if (_errno < 0) {
if (netif_msg_drv(priv))
netdev_err(net_dev,
"eth_mac_addr() = %d\n",
_errno);
return _errno;
}
mac_dev = priv->mac_dev;
_errno = mac_dev->change_addr(mac_dev->get_mac_handle(mac_dev),
net_dev->dev_addr);
if (_errno < 0) {
if (netif_msg_drv(priv))
netdev_err(net_dev,
"mac_dev->change_addr() = %d\n",
_errno);
return _errno;
}
return 0;
}
void dpa_set_rx_mode(struct net_device *net_dev)
{
int _errno;
const struct dpa_priv_s *priv;
priv = netdev_priv(net_dev);
if (!!(net_dev->flags & IFF_PROMISC) != priv->mac_dev->promisc) {
priv->mac_dev->promisc = !priv->mac_dev->promisc;
_errno = priv->mac_dev->set_promisc(
priv->mac_dev->get_mac_handle(priv->mac_dev),
priv->mac_dev->promisc);
if (unlikely(_errno < 0) && netif_msg_drv(priv))
netdev_err(net_dev,
"mac_dev->set_promisc() = %d\n",
_errno);
}
_errno = priv->mac_dev->set_multi(net_dev);
if (unlikely(_errno < 0) && netif_msg_drv(priv))
netdev_err(net_dev, "mac_dev->set_multi() = %d\n", _errno);
}
#if defined(CONFIG_FSL_DPAA_1588) || defined(CONFIG_FSL_DPAA_TS)
u64 dpa_get_timestamp_ns(const struct dpa_priv_s *priv, enum port_type rx_tx,
const void *data)
{
u64 *ts, ns;
ts = fm_port_get_buffer_time_stamp(priv->mac_dev->port_dev[rx_tx],
data);
if (!ts || *ts == 0)
return 0;
/* multiple DPA_PTP_NOMINAL_FREQ_PERIOD_NS for case of non power of 2 */
ns = *ts << DPA_PTP_NOMINAL_FREQ_PERIOD_SHIFT;
return ns;
}
#endif
#ifdef CONFIG_FSL_DPAA_TS
int dpa_get_ts(const struct dpa_priv_s *priv, enum port_type rx_tx,
struct skb_shared_hwtstamps *shhwtstamps, const void *data)
{
u64 ns;
ns = dpa_get_timestamp_ns(priv, rx_tx, data);
if (ns == 0)
return -EINVAL;
memset(shhwtstamps, 0, sizeof(*shhwtstamps));
shhwtstamps->hwtstamp = ns_to_ktime(ns);
return 0;
}
static void dpa_ts_tx_enable(struct net_device *dev)
{
struct dpa_priv_s *priv = netdev_priv(dev);
struct mac_device *mac_dev = priv->mac_dev;
if (mac_dev->fm_rtc_enable)
mac_dev->fm_rtc_enable(get_fm_handle(dev));
if (mac_dev->ptp_enable)
mac_dev->ptp_enable(mac_dev->get_mac_handle(mac_dev));
priv->ts_tx_en = TRUE;
}
static void dpa_ts_tx_disable(struct net_device *dev)
{
struct dpa_priv_s *priv = netdev_priv(dev);
#if 0
/*
* the RTC might be needed by the Rx Ts, cannot disable here
* no separate ptp_disable API for Rx/Tx, cannot disable here
*/
struct mac_device *mac_dev = priv->mac_dev;
if (mac_dev->fm_rtc_disable)
mac_dev->fm_rtc_disable(get_fm_handle(dev));
if (mac_dev->ptp_disable)
mac_dev->ptp_disable(mac_dev->get_mac_handle(mac_dev));
#endif
priv->ts_tx_en = FALSE;
}
static void dpa_ts_rx_enable(struct net_device *dev)
{
struct dpa_priv_s *priv = netdev_priv(dev);
struct mac_device *mac_dev = priv->mac_dev;
if (mac_dev->fm_rtc_enable)
mac_dev->fm_rtc_enable(get_fm_handle(dev));
if (mac_dev->ptp_enable)
mac_dev->ptp_enable(mac_dev->get_mac_handle(mac_dev));
priv->ts_rx_en = TRUE;
}
static void dpa_ts_rx_disable(struct net_device *dev)
{
struct dpa_priv_s *priv = netdev_priv(dev);
#if 0
/*
* the RTC might be needed by the Tx Ts, cannot disable here
* no separate ptp_disable API for Rx/Tx, cannot disable here
*/
struct mac_device *mac_dev = priv->mac_dev;
if (mac_dev->fm_rtc_disable)
mac_dev->fm_rtc_disable(get_fm_handle(dev));
if (mac_dev->ptp_disable)
mac_dev->ptp_disable(mac_dev->get_mac_handle(mac_dev));
#endif
priv->ts_rx_en = FALSE;
}
static int dpa_ts_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
{
struct hwtstamp_config config;
if (copy_from_user(&config, rq->ifr_data, sizeof(config)))
return -EFAULT;
switch (config.tx_type) {
case HWTSTAMP_TX_OFF:
dpa_ts_tx_disable(dev);
break;
case HWTSTAMP_TX_ON:
dpa_ts_tx_enable(dev);
break;
default:
return -ERANGE;
}
if (config.rx_filter == HWTSTAMP_FILTER_NONE)
dpa_ts_rx_disable(dev);
else {
dpa_ts_rx_enable(dev);
/* TS is set for all frame types, not only those requested */
config.rx_filter = HWTSTAMP_FILTER_ALL;
}
return copy_to_user(rq->ifr_data, &config, sizeof(config)) ?
-EFAULT : 0;
}
#endif /* CONFIG_FSL_DPAA_TS */
int dpa_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
{
#ifdef CONFIG_FSL_DPAA_1588
struct dpa_priv_s *priv = netdev_priv(dev);
#endif
int ret = 0;
/* at least one timestamping feature must be enabled to proceed */
#if defined(CONFIG_FSL_DPAA_1588) || defined(CONFIG_FSL_DPAA_TS)
if (!netif_running(dev))
#endif
return -EINVAL;
#ifdef CONFIG_FSL_DPAA_TS
if (cmd == SIOCSHWTSTAMP)
return dpa_ts_ioctl(dev, rq, cmd);
#endif /* CONFIG_FSL_DPAA_TS */
#ifdef CONFIG_FSL_DPAA_1588
if ((cmd >= PTP_ENBL_TXTS_IOCTL) && (cmd <= PTP_CLEANUP_TS)) {
if (priv->tsu && priv->tsu->valid)
ret = dpa_ioctl_1588(dev, rq, cmd);
else
ret = -ENODEV;
}
#endif
return ret;
}
#ifndef CONFIG_FSL_DPAA_ETH_SG_SUPPORT
/*
* When we put the buffer into the pool, we purposefully added
* some padding to the address so that the buffers wouldn't all
* be page-aligned. But the skb has been reset to a default state,
* so it is pointing up to DPAA_ETH_MAX_PAD - L1_CACHE_BYTES bytes
* before the actual data. We subtract skb->head from the fd addr,
* and then mask off the translated part to get the actual distance.
*/
static int dpa_process_one(struct dpa_percpu_priv_s *percpu_priv,
struct sk_buff *skb, struct dpa_bp *bp, const struct qm_fd *fd)
{
dma_addr_t addr = qm_fd_addr(fd);
u32 addrlo = lower_32_bits(addr);
u32 skblo = lower_32_bits((unsigned long)skb->head);
u32 pad = (addrlo - skblo) & (PAGE_SIZE - 1);
unsigned int data_start;
(*percpu_priv->dpa_bp_count)--;
/*
* The skb is currently pointed at head + headroom. The packet
* starts at skb->head + pad + fd offset.
*/
data_start = pad + dpa_fd_offset(fd) - skb_headroom(skb);
skb_put(skb, dpa_fd_length(fd) + data_start);
skb_pull(skb, data_start);
return 0;
}
#endif
/*
* Checks whether the checksum field in Parse Results array is valid
* (equals 0xFFFF) and increments the .cse counter otherwise
*/
static inline void
dpa_csum_validation(const struct dpa_priv_s *priv,
struct dpa_percpu_priv_s *percpu_priv,
const struct qm_fd *fd)
{
dma_addr_t addr = qm_fd_addr(fd);
struct dpa_bp *dpa_bp = priv->dpa_bp;
void *frm = phys_to_virt(addr);
t_FmPrsResult *parse_result;
if (unlikely(!frm))
return;
dma_unmap_single(dpa_bp->dev, addr, dpa_bp->size, DMA_BIDIRECTIONAL);
parse_result = (t_FmPrsResult *)(frm + DPA_RX_PRIV_DATA_SIZE);
if (parse_result->cksum != DPA_CSUM_VALID)
percpu_priv->rx_errors.cse++;
}
static void _dpa_rx_error(struct net_device *net_dev,
const struct dpa_priv_s *priv,
struct dpa_percpu_priv_s *percpu_priv,
const struct qm_fd *fd,
u32 fqid)
{
/*
* limit common, possibly innocuous Rx FIFO Overflow errors'
* interference with zero-loss convergence benchmark results.
*/
if (likely(fd->status & FM_FD_STAT_ERR_PHYSICAL))
pr_warn_once("fsl-dpa: non-zero error counters " \
"in fman statistics (sysfs)\n");
else
if (netif_msg_hw(priv) && net_ratelimit())
netdev_err(net_dev, "Err FD status = 0x%08x\n",
fd->status & FM_FD_STAT_ERRORS);
if (dpaa_eth_hooks.rx_error &&
dpaa_eth_hooks.rx_error(net_dev, fd, fqid) == DPAA_ETH_STOLEN)
/* it's up to the hook to perform resource cleanup */
return;
percpu_priv->stats.rx_errors++;
if (fd->status & FM_PORT_FRM_ERR_DMA)
percpu_priv->rx_errors.dme++;
if (fd->status & FM_PORT_FRM_ERR_PHYSICAL)
percpu_priv->rx_errors.fpe++;
if (fd->status & FM_PORT_FRM_ERR_SIZE)
percpu_priv->rx_errors.fse++;
if (fd->status & FM_PORT_FRM_ERR_PRS_HDR_ERR)
percpu_priv->rx_errors.phe++;
if (fd->status & FM_FD_STAT_L4CV)
dpa_csum_validation(priv, percpu_priv, fd);
dpa_fd_release(net_dev, fd);
}
static void _dpa_tx_error(struct net_device *net_dev,
const struct dpa_priv_s *priv,
struct dpa_percpu_priv_s *percpu_priv,
const struct qm_fd *fd,
u32 fqid)
{
struct sk_buff *skb;
if (netif_msg_hw(priv) && net_ratelimit())
netdev_warn(net_dev, "FD status = 0x%08x\n",
fd->status & FM_FD_STAT_ERRORS);
if (dpaa_eth_hooks.tx_error &&
dpaa_eth_hooks.tx_error(net_dev, fd, fqid) == DPAA_ETH_STOLEN)
/* now the hook must ensure proper cleanup */
return;
percpu_priv->stats.tx_errors++;
skb = _dpa_cleanup_tx_fd(priv, fd);
dev_kfree_skb(skb);
}
/*
* Helper function to factor out frame validation logic on all Rx paths. Its
* purpose is to extract from the Parse Results structure information about
* the integrity of the frame, its checksum, the length of the parsed headers
* and whether the frame is suitable for GRO.
*
* Assumes no parser errors, since any error frame is dropped before this
* function is called.
*
* @skb will have its ip_summed field overwritten;
* @use_gro will only be written with 0, if the frame is definitely not
* GRO-able; otherwise, it will be left unchanged;
* @hdr_size will be written with a safe value, at least the size of the
* headers' length.
*/
void __hot _dpa_process_parse_results(const t_FmPrsResult *parse_results,
const struct qm_fd *fd,
struct sk_buff *skb, int *use_gro)
{
if (fd->status & FM_FD_STAT_L4CV) {
/*
* The parser has run and performed L4 checksum validation.
* We know there were no parser errors (and implicitly no
* L4 csum error), otherwise we wouldn't be here.
*/
skb->ip_summed = CHECKSUM_UNNECESSARY;
/*
* Don't go through GRO for certain types of traffic that
* we know are not GRO-able, such as dgram-based protocols.
* In the worst-case scenarios, such as small-pkt terminating
* UDP, the extra GRO processing would be overkill.
*
* The only protocol the Parser supports that is also GRO-able
* is currently TCP.
*/
if (!fm_l4_frame_is_tcp(parse_results))
*use_gro = 0;
return;
}
/*
* We're here because either the parser didn't run or the L4 checksum
* was not verified. This may include the case of a UDP frame with
* checksum zero or an L4 proto other than TCP/UDP
*/
skb->ip_summed = CHECKSUM_NONE;
/* Bypass GRO for unknown traffic or if no PCDs are applied */
*use_gro = 0;
}
#ifndef CONFIG_FSL_DPAA_ETH_SG_SUPPORT
void __hot _dpa_rx(struct net_device *net_dev,
const struct dpa_priv_s *priv,
struct dpa_percpu_priv_s *percpu_priv,
const struct qm_fd *fd,
u32 fqid)
{
struct dpa_bp *dpa_bp;
struct sk_buff *skb;
struct sk_buff **skbh;
dma_addr_t addr = qm_fd_addr(fd);
u32 fd_status = fd->status;
unsigned int skb_len;
t_FmPrsResult *parse_result;
int use_gro = net_dev->features & NETIF_F_GRO;
skbh = (struct sk_buff **)phys_to_virt(addr);
if (unlikely(fd_status & FM_FD_STAT_ERRORS) != 0) {
if (netif_msg_hw(priv) && net_ratelimit())
netdev_warn(net_dev, "FD status = 0x%08x\n",
fd->status & FM_FD_STAT_ERRORS);
percpu_priv->stats.rx_errors++;
goto _return_dpa_fd_release;
}
if (unlikely(fd->format != qm_fd_contig)) {
percpu_priv->stats.rx_dropped++;
if (netif_msg_rx_status(priv) && net_ratelimit())
netdev_warn(net_dev, "Dropping a SG frame\n");
goto _return_dpa_fd_release;
}
dpa_bp = dpa_bpid2pool(fd->bpid);
dma_unmap_single(dpa_bp->dev, addr, dpa_bp->size, DMA_BIDIRECTIONAL);
/* Execute the Rx processing hook, if it exists. */
if (dpaa_eth_hooks.rx_default && dpaa_eth_hooks.rx_default((void *)fd,
net_dev, fqid) == DPAA_ETH_STOLEN)
/* won't count the rx bytes in */
goto skb_stolen;
skb = *skbh;
prefetch(skb);
/* Fill the SKB */
dpa_process_one(percpu_priv, skb, dpa_bp, fd);
prefetch(skb_shinfo(skb));
#ifdef CONFIG_FSL_DPAA_1588
if (priv->tsu && priv->tsu->valid && priv->tsu->hwts_rx_en_ioctl)
dpa_ptp_store_rxstamp(priv, skb, (void *)skbh);
#endif
skb->protocol = eth_type_trans(skb, net_dev);
if (unlikely(dpa_check_rx_mtu(skb, net_dev->mtu))) {
percpu_priv->stats.rx_dropped++;
goto drop_large_frame;
}
skb_len = skb->len;
/* Validate the skb csum and figure out whether GRO is appropriate */
parse_result = (t_FmPrsResult *)((u8 *)skbh + DPA_RX_PRIV_DATA_SIZE);
_dpa_process_parse_results(parse_result, fd, skb, &use_gro);
#ifdef CONFIG_FSL_DPAA_TS
if (priv->ts_rx_en)
dpa_get_ts(priv, RX, skb_hwtstamps(skb), (void *)skbh);
#endif /* CONFIG_FSL_DPAA_TS */
if (use_gro) {
gro_result_t gro_result;
gro_result = napi_gro_receive(&percpu_priv->napi, skb);
if (unlikely(gro_result == GRO_DROP)) {
percpu_priv->stats.rx_dropped++;
goto packet_dropped;
}
} else if (unlikely(netif_receive_skb(skb) == NET_RX_DROP)) {
percpu_priv->stats.rx_dropped++;
goto packet_dropped;
}
percpu_priv->stats.rx_packets++;
percpu_priv->stats.rx_bytes += skb_len;
packet_dropped:
skb_stolen:
return;
drop_large_frame:
dev_kfree_skb(skb);
return;
_return_dpa_fd_release:
dpa_fd_release(net_dev, fd);
}
#endif /* CONFIG_FSL_DPAA_ETH_SG_SUPPORT */
static void dpaa_eth_napi_disable(struct dpa_priv_s *priv)
{
struct dpa_percpu_priv_s *percpu_priv;
int i;
if (priv->shared)
return;
for_each_online_cpu(i) {
percpu_priv = per_cpu_ptr(priv->percpu_priv, i);
napi_disable(&percpu_priv->napi);
}
}
static void dpaa_eth_napi_enable(struct dpa_priv_s *priv)
{
struct dpa_percpu_priv_s *percpu_priv;
int i;
if (priv->shared)
return;
for_each_online_cpu(i) {
percpu_priv = per_cpu_ptr(priv->percpu_priv, i);
napi_enable(&percpu_priv->napi);
}
}
static int dpaa_eth_poll(struct napi_struct *napi, int budget)
{
int cleaned = qman_poll_dqrr(budget);
if (cleaned < budget) {
int tmp;
napi_complete(napi);
tmp = qman_irqsource_add(QM_PIRQ_DQRI);
BUG_ON(tmp);
}
return cleaned;
}
static void __hot _dpa_tx_conf(struct net_device *net_dev,
const struct dpa_priv_s *priv,
struct dpa_percpu_priv_s *percpu_priv,
const struct qm_fd *fd,
u32 fqid)
{
struct sk_buff *skb;
/* do we need the timestamp for the error frames? */
if (unlikely(fd->status & FM_FD_STAT_ERRORS) != 0) {
if (netif_msg_hw(priv) && net_ratelimit())
netdev_warn(net_dev, "FD status = 0x%08x\n",
fd->status & FM_FD_STAT_ERRORS);
percpu_priv->stats.tx_errors++;
}
/* hopefully we need not get the timestamp before the hook */
if (dpaa_eth_hooks.tx_confirm && dpaa_eth_hooks.tx_confirm(net_dev,
fd, fqid) == DPAA_ETH_STOLEN)
/* it's the hook that must now perform cleanup */
return;
/* This might not perfectly reflect the reality, if the core dequeueing
* the Tx confirmation is different from the one that did the enqueue,
* but at least it'll show up in the total count. */
percpu_priv->tx_confirm++;
skb = _dpa_cleanup_tx_fd(priv, fd);
dev_kfree_skb(skb);
}
void dpa_set_buffers_layout(struct mac_device *mac_dev,
struct dpa_buffer_layout_s *layout)
{
struct fm_port_params params;
/* Rx */
layout[RX].priv_data_size = DPA_RX_PRIV_DATA_SIZE;
layout[RX].parse_results = true;
layout[RX].hash_results = true;
#if defined(CONFIG_FSL_DPAA_1588) || defined(CONFIG_FSL_DPAA_TS)
layout[RX].time_stamp = true;
#endif
fm_port_get_buff_layout_ext_params(mac_dev->port_dev[RX], ¶ms);
layout[RX].manip_extra_space = params.manip_extra_space;
layout[RX].data_align = params.data_align;
/* Tx */
layout[TX].priv_data_size = DPA_TX_PRIV_DATA_SIZE;
layout[TX].parse_results = true;
layout[TX].hash_results = true;
#if defined(CONFIG_FSL_DPAA_1588) || defined(CONFIG_FSL_DPAA_TS)
layout[TX].time_stamp = true;
#endif
fm_port_get_buff_layout_ext_params(mac_dev->port_dev[TX], ¶ms);
layout[TX].manip_extra_space = params.manip_extra_space;
layout[TX].data_align = params.data_align;
}
/**
* Turn on HW checksum computation for this outgoing frame.
* If the current protocol is not something we support in this regard
* (or if the stack has already computed the SW checksum), we do nothing.
*
* Returns 0 if all goes well (or HW csum doesn't apply), and a negative value
* otherwise.
*
* Note that this function may modify the fd->cmd field and the skb data buffer
* (the Parse Results area).
*/
int dpa_enable_tx_csum(struct dpa_priv_s *priv,
struct sk_buff *skb, struct qm_fd *fd, char *parse_results)
{
t_FmPrsResult *parse_result;
struct iphdr *iph;
struct ipv6hdr *ipv6h = NULL;
int l4_proto;
int ethertype = ntohs(skb->protocol);
int retval = 0;
if (!priv->mac_dev || skb->ip_summed != CHECKSUM_PARTIAL)
return 0;
/* Note: L3 csum seems to be already computed in sw, but we can't choose
* L4 alone from the FM configuration anyway. */
/* Fill in some fields of the Parse Results array, so the FMan
* can find them as if they came from the FMan Parser. */
parse_result = (t_FmPrsResult *)parse_results;
/* If we're dealing with VLAN, get the real Ethernet type */
if (ethertype == ETH_P_8021Q) {
/* We can't always assume the MAC header is set correctly
* by the stack, so reset to beginning of skb->data */
skb_reset_mac_header(skb);
ethertype = ntohs(vlan_eth_hdr(skb)->h_vlan_encapsulated_proto);
}
/* Fill in the relevant L3 parse result fields
* and read the L4 protocol type */
switch (ethertype) {
case ETH_P_IP:
parse_result->l3r = FM_L3_PARSE_RESULT_IPV4;
iph = ip_hdr(skb);
BUG_ON(iph == NULL);
l4_proto = ntohs(iph->protocol);
break;
case ETH_P_IPV6:
parse_result->l3r = FM_L3_PARSE_RESULT_IPV6;
ipv6h = ipv6_hdr(skb);
BUG_ON(ipv6h == NULL);
l4_proto = ntohs(ipv6h->nexthdr);
break;
default:
/* We shouldn't even be here */
if (netif_msg_tx_err(priv) && net_ratelimit())
netdev_alert(priv->net_dev, "Can't compute HW csum "
"for L3 proto 0x%x\n", ntohs(skb->protocol));
retval = -EIO;
goto return_error;
}
/* Fill in the relevant L4 parse result fields */
switch (l4_proto) {
case IPPROTO_UDP:
parse_result->l4r = FM_L4_PARSE_RESULT_UDP;
break;
case IPPROTO_TCP:
parse_result->l4r = FM_L4_PARSE_RESULT_TCP;
break;
default:
/* This can as well be a BUG() */
if (netif_msg_tx_err(priv) && net_ratelimit())
netdev_alert(priv->net_dev, "Can't compute HW csum "
"for L4 proto 0x%x\n", l4_proto);
retval = -EIO;
goto return_error;
}
/* At index 0 is IPOffset_1 as defined in the Parse Results */
parse_result->ip_off[0] = skb_network_offset(skb);
parse_result->l4_off = skb_transport_offset(skb);
/* Enable L3 (and L4, if TCP or UDP) HW checksum. */
fd->cmd |= FM_FD_CMD_RPD | FM_FD_CMD_DTC;
/*
* On P1023 and similar platforms fd->cmd interpretation could
* be disabled by setting CONTEXT_A bit ICMD; currently this bit
* is not set so we do not need to check; in the future, if/when
* using context_a we need to check this bit
*/
return_error:
return retval;
}
#ifndef CONFIG_FSL_DPAA_ETH_SG_SUPPORT
static int skb_to_sg_fd(struct dpa_priv_s *priv,
struct sk_buff *skb, struct qm_fd *fd)
{
struct dpa_bp *dpa_bp = priv->dpa_bp;
void *vaddr;
dma_addr_t paddr;
struct sk_buff **skbh;
struct qm_sg_entry *sg_entry;
struct net_device *net_dev = priv->net_dev;
int err;
/* Allocate the first buffer in the FD (used for storing S/G table) */
vaddr = kmalloc(sgt_buffer_size(priv), GFP_ATOMIC);
if (unlikely(vaddr == NULL)) {
if (netif_msg_tx_err(priv) && net_ratelimit())
netdev_err(net_dev, "Memory allocation failed\n");
return -ENOMEM;
}
/* Store skb backpointer at the beginning of the buffer */
skbh = (struct sk_buff **)vaddr;
*skbh = skb;
/* Fill in FD */
fd->format = qm_fd_sg;
fd->offset = priv->tx_headroom;
fd->length20 = skb->len;
/* Enable hardware checksum computation */
err = dpa_enable_tx_csum(priv, skb, fd,
(char *)vaddr + DPA_TX_PRIV_DATA_SIZE);
if (unlikely(err < 0)) {
if (netif_msg_tx_err(priv) && net_ratelimit())
netdev_err(net_dev, "HW csum error: %d\n", err);
kfree(vaddr);
return err;
}
/* Map the buffer and store its address in the FD */
paddr = dma_map_single(dpa_bp->dev, vaddr, sgt_buffer_size(priv),
DMA_TO_DEVICE);
if (unlikely(dma_mapping_error(dpa_bp->dev, paddr))) {
if (netif_msg_tx_err(priv) && net_ratelimit())
netdev_err(net_dev, "DMA mapping failed\n");
kfree(vaddr);
return -EINVAL;
}
fd->addr_hi = upper_32_bits(paddr);
fd->addr_lo = lower_32_bits(paddr);
/* Fill in S/G entry */
sg_entry = (struct qm_sg_entry *)(vaddr + fd->offset);
sg_entry->extension = 0;
sg_entry->final = 1;
sg_entry->length = skb->len;
/*
* Put the same offset in the data buffer as in the SGT (first) buffer.
* This is the format for S/G frames generated by FMan; the manual is
* not clear if same is required of Tx S/G frames, but since we know
* for sure we have at least tx_headroom bytes of skb headroom,
* lets not take any chances.
*/
sg_entry->offset = priv->tx_headroom;
paddr = dma_map_single(dpa_bp->dev, skb->data - sg_entry->offset,
dpa_bp->size, DMA_TO_DEVICE);
if (unlikely(dma_mapping_error(dpa_bp->dev, paddr))) {
if (netif_msg_tx_err(priv) && net_ratelimit())
netdev_err(net_dev, "DMA mapping failed\n");
return -EINVAL;
}
sg_entry->addr_hi = upper_32_bits(paddr);
sg_entry->addr_lo = lower_32_bits(paddr);
#ifdef CONFIG_FSL_DPAA_TS
if (unlikely(priv->ts_tx_en &&
skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
}
#endif /* CONFIG_FSL_DPAA_TS */
return 0;
}
static int skb_to_contig_fd(struct dpa_priv_s *priv,
struct dpa_percpu_priv_s *percpu_priv,
struct sk_buff *skb, struct qm_fd *fd)
{
struct sk_buff **skbh;
dma_addr_t addr;
struct dpa_bp *dpa_bp = priv->dpa_bp;
struct net_device *net_dev = priv->net_dev;
enum dma_data_direction dma_dir = DMA_TO_DEVICE;
bool can_recycle = false;
int offset, extra_offset;
int err;
/*
* We are guaranteed that we have at least tx_headroom bytes.
* Buffers we allocated are padded to improve cache usage. In order
* to increase buffer re-use, we aim to keep any such buffers the
* same. This means the address passed to the FM should be
* tx_headroom bytes before the data for forwarded frames.
*
* However, offer some flexibility in fd layout, to allow originating
* (termination) buffers to be also recycled when possible.
*
* First, see if the conditions needed to recycle the skb are met:
* - skb not cloned, not shared
* - buffer size is large enough to accomodate a maximum size Rx frame
* - buffer size does not exceed the maximum size allowed in the pool
* (to avoid unbounded increase of buffer size in certain forwarding
* conditions)
* - buffer address is 16 byte aligned, as per DPAARM
* - there's enough room in the buffer pool
*/
if (likely(skb_is_recycleable(skb, dpa_bp->size) &&
(skb_end_pointer(skb) - skb->head <=
dpa_bp->size + DPA_RECYCLE_EXTRA_SIZE) &&
(*percpu_priv->dpa_bp_count < dpa_bp->target_count))) {
/* Compute the minimum necessary fd offset */
offset = dpa_bp->size - skb->len - skb_tailroom(skb);
/*
* And make sure the offset is no lower than the offset
* required by FMan
*/
offset = max_t(int, offset, priv->tx_headroom);
/*
* We also need to align the buffer address to 16, such that
* Fman will be able to reuse it on Rx.
* Since the buffer going to FMan starts at (skb->data - offset)
* this is what we'll try to align. We already know that
* headroom is at least tx_headroom bytes long, but with
* the extra offset needed for alignment we may go beyond
* the beginning of the buffer.
*
* Also need to check that we don't go beyond the maximum
* offset that can be set for a contiguous FD.
*/
extra_offset = (unsigned long)(skb->data - offset) & 0xF;
if (likely((offset + extra_offset) <= skb_headroom(skb) &&
(offset + extra_offset) <= DPA_MAX_FD_OFFSET)) {
/* We're good to go for recycling*/
offset += extra_offset;
can_recycle = true;
}
}
#ifdef CONFIG_FSL_DPAA_TS
if (unlikely(priv->ts_tx_en &&
skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
/* we need the fd back to get the timestamp */
can_recycle = false;
skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
}
#endif /* CONFIG_FSL_DPAA_TS */
if (likely(can_recycle)) {
/* Buffer will get recycled, setup fd accordingly */
fd->cmd |= FM_FD_CMD_FCO;
fd->bpid = dpa_bp->bpid;
/*
* Since the buffer will get back to the Bman pool
* and be re-used on Rx, map it for both read and write
*/
dma_dir = DMA_BIDIRECTIONAL;
} else {
/*
* No recycling here, so we don't care about address alignment.
* Just use the smallest offset required by FMan
*/
offset = priv->tx_headroom;
}
skbh = (struct sk_buff **)(skb->data - offset);
*skbh = skb;
/* Enable L3/L4 hardware checksum computation.
*
* We must do this before dma_map_single(), because we may
* need to write into the skb. */
err = dpa_enable_tx_csum(priv, skb, fd,
((char *)skbh) + DPA_TX_PRIV_DATA_SIZE);
if (unlikely(err < 0)) {
if (netif_msg_tx_err(priv) && net_ratelimit())
netdev_err(net_dev, "HW csum error: %d\n", err);
return err;
}
fd->format = qm_fd_contig;
fd->length20 = skb->len;
fd->offset = offset;
addr = dma_map_single(dpa_bp->dev, skbh, dpa_bp->size, dma_dir);
if (unlikely(dma_mapping_error(dpa_bp->dev, addr))) {
if (netif_msg_tx_err(priv) && net_ratelimit())
netdev_err(net_dev, "dma_map_single() failed\n");
return -EINVAL;
}
fd->addr_hi = upper_32_bits(addr);
fd->addr_lo = lower_32_bits(addr);
return 0;
}
int __hot dpa_tx(struct sk_buff *skb, struct net_device *net_dev)
{
struct dpa_priv_s *priv;
struct qm_fd fd;
struct dpa_percpu_priv_s *percpu_priv;
struct rtnl_link_stats64 *percpu_stats;
int queue_mapping;
int err;
/* If there is a Tx hook, run it. */
if (dpaa_eth_hooks.tx &&
dpaa_eth_hooks.tx(skb, net_dev) == DPAA_ETH_STOLEN)
/* won't update any Tx stats */
goto done;
priv = netdev_priv(net_dev);
percpu_priv = per_cpu_ptr(priv->percpu_priv, smp_processor_id());
percpu_stats = &percpu_priv->stats;
clear_fd(&fd);
queue_mapping = dpa_get_queue_mapping(skb);
if (unlikely(skb_headroom(skb) < priv->tx_headroom)) {
struct sk_buff *skb_new;
skb_new = skb_realloc_headroom(skb, priv->tx_headroom);
if (unlikely(!skb_new)) {
percpu_stats->tx_errors++;
kfree_skb(skb);
goto done;
}
kfree_skb(skb);
skb = skb_new;
}
#ifdef CONFIG_FSL_DPAA_1588
if (priv->tsu && priv->tsu->valid && priv->tsu->hwts_tx_en_ioctl)
fd.cmd |= FM_FD_CMD_UPD;
#endif
#ifdef CONFIG_FSL_DPAA_TS
if (unlikely(priv->ts_tx_en &&
skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP))
fd.cmd |= FM_FD_CMD_UPD;
#endif /* CONFIG_FSL_DPAA_TS */
/*
* We have two paths here:
*
* 1.If the skb is cloned, create a S/G frame to avoid unsharing it.
* The S/G table will contain only one entry, pointing to our skb
* data buffer.
* The private data area containing the skb backpointer will reside
* inside the first buffer, such that it won't risk being overwritten
* in case a second skb pointing to the same data buffer is being
* processed concurently.
* No recycling is possible in this case, as the data buffer is shared.
*
* 2.If skb is not cloned, then the private area inside it can be
* safely used to store the skb backpointer. Simply create a contiguous
* fd in this case.
* Recycling can happen if the right conditions are met.
*/
if (skb_cloned(skb) && (skb->len > DPA_SKB_COPY_MAX_SIZE))
err = skb_to_sg_fd(priv, skb, &fd);
else {
/* If cloned skb, but length is below DPA_SKB_COPY_MAX_SIZE,
* it's more efficient to unshare it and then use the new skb */
skb = skb_unshare(skb, GFP_ATOMIC);
if (unlikely(!skb)) {
percpu_stats->tx_errors++;
goto done;
}
err = skb_to_contig_fd(priv, percpu_priv, skb, &fd);
}
if (unlikely(err < 0)) {
percpu_stats->tx_errors++;
goto fd_create_failed;
}
if (fd.cmd & FM_FD_CMD_FCO) {
/* This skb is recycleable, and the fd generated from it
* has been filled in accordingly.
* NOTE: The recycling mechanism is fragile and dependant on
* upstream changes. It will be maintained for now, but plans
* are to remove it altoghether from the driver.
*/
skb_recycle(skb);
skb = NULL;
(*percpu_priv->dpa_bp_count)++;
percpu_priv->tx_returned++;
}
if (unlikely(dpa_xmit(priv, percpu_stats, queue_mapping,
&fd) < 0))
goto xmit_failed;
net_dev->trans_start = jiffies;
goto done;
xmit_failed:
if (fd.cmd & FM_FD_CMD_FCO) {
(*percpu_priv->dpa_bp_count)--;
percpu_priv->tx_returned--;
}
fd_create_failed:
_dpa_cleanup_tx_fd(priv, &fd);
dev_kfree_skb(skb);
done:
return NETDEV_TX_OK;
}
#endif /* CONFIG_FSL_DPAA_ETH_SG_SUPPORT */
/**
* Congestion group state change notification callback.
* Stops the device's egress queues while they are congested and
* wakes them upon exiting congested state.
* Also updates some CGR-related stats.
*/
static void dpaa_eth_cgscn(struct qman_portal *qm, struct qman_cgr *cgr,
int congested)
{
struct dpa_priv_s *priv = (struct dpa_priv_s *)container_of(cgr,
struct dpa_priv_s, cgr_data.cgr);
if (congested) {
priv->cgr_data.congestion_start_jiffies = jiffies;
netif_tx_stop_all_queues(priv->net_dev);
priv->cgr_data.cgr_congested_count++;
} else {
priv->cgr_data.congested_jiffies +=
(jiffies - priv->cgr_data.congestion_start_jiffies);
netif_tx_wake_all_queues(priv->net_dev);
}
}
static enum qman_cb_dqrr_result
ingress_rx_error_dqrr(struct qman_portal *portal,
struct qman_fq *fq,
const struct qm_dqrr_entry *dq)
{
struct net_device *net_dev;
struct dpa_priv_s *priv;
struct dpa_percpu_priv_s *percpu_priv;
net_dev = ((struct dpa_fq *)fq)->net_dev;
priv = netdev_priv(net_dev);
percpu_priv = per_cpu_ptr(priv->percpu_priv, smp_processor_id());
if (dpaa_eth_napi_schedule(percpu_priv)) {
percpu_priv->in_interrupt++;
return qman_cb_dqrr_stop;
}
dpaa_eth_refill_bpools(percpu_priv);
_dpa_rx_error(net_dev, priv, percpu_priv, &dq->fd, fq->fqid);
return qman_cb_dqrr_consume;
}
static enum qman_cb_dqrr_result __hot
ingress_rx_default_dqrr(struct qman_portal *portal,
struct qman_fq *fq,
const struct qm_dqrr_entry *dq)
{
struct net_device *net_dev;
struct dpa_priv_s *priv;
struct dpa_percpu_priv_s *percpu_priv;
net_dev = ((struct dpa_fq *)fq)->net_dev;
priv = netdev_priv(net_dev);
/* Trace the Rx fd */
trace_dpa_rx_fd(net_dev, fq, &dq->fd);
/* IRQ handler, non-migratable; safe to use __this_cpu_ptr here */
percpu_priv = __this_cpu_ptr(priv->percpu_priv);
if (unlikely(dpaa_eth_napi_schedule(percpu_priv))) {
percpu_priv->in_interrupt++;
return qman_cb_dqrr_stop;
}
/* Vale of plenty: make sure we didn't run out of buffers */
dpaa_eth_refill_bpools(percpu_priv);
_dpa_rx(net_dev, priv, percpu_priv, &dq->fd, fq->fqid);
return qman_cb_dqrr_consume;
}
static enum qman_cb_dqrr_result
ingress_tx_error_dqrr(struct qman_portal *portal,
struct qman_fq *fq,
const struct qm_dqrr_entry *dq)
{
struct net_device *net_dev;
struct dpa_priv_s *priv;
struct dpa_percpu_priv_s *percpu_priv;
net_dev = ((struct dpa_fq *)fq)->net_dev;
priv = netdev_priv(net_dev);
percpu_priv = per_cpu_ptr(priv->percpu_priv, smp_processor_id());
if (dpaa_eth_napi_schedule(percpu_priv)) {
percpu_priv->in_interrupt++;
return qman_cb_dqrr_stop;
}
_dpa_tx_error(net_dev, priv, percpu_priv, &dq->fd, fq->fqid);
return qman_cb_dqrr_consume;
}
static enum qman_cb_dqrr_result __hot
ingress_tx_default_dqrr(struct qman_portal *portal,
struct qman_fq *fq,
const struct qm_dqrr_entry *dq)
{
struct net_device *net_dev;
struct dpa_priv_s *priv;
struct dpa_percpu_priv_s *percpu_priv;
net_dev = ((struct dpa_fq *)fq)->net_dev;
priv = netdev_priv(net_dev);
/* Trace the fd */
trace_dpa_tx_conf_fd(net_dev, fq, &dq->fd);
/* Non-migratable context, safe to use __this_cpu_ptr */
percpu_priv = __this_cpu_ptr(priv->percpu_priv);
if (dpaa_eth_napi_schedule(percpu_priv)) {
percpu_priv->in_interrupt++;
return qman_cb_dqrr_stop;
}
_dpa_tx_conf(net_dev, priv, percpu_priv, &dq->fd, fq->fqid);
return qman_cb_dqrr_consume;
}
void count_ern(struct dpa_percpu_priv_s *percpu_priv,
const struct qm_mr_entry *msg)
{
switch (msg->ern.rc & QM_MR_RC_MASK) {
case QM_MR_RC_CGR_TAILDROP:
percpu_priv->ern_cnt.cg_tdrop++;
break;
case QM_MR_RC_WRED:
percpu_priv->ern_cnt.wred++;
break;
case QM_MR_RC_ERROR:
percpu_priv->ern_cnt.err_cond++;
break;
case QM_MR_RC_ORPWINDOW_EARLY:
percpu_priv->ern_cnt.early_window++;
break;
case QM_MR_RC_ORPWINDOW_LATE:
percpu_priv->ern_cnt.late_window++;
break;
case QM_MR_RC_FQ_TAILDROP:
percpu_priv->ern_cnt.fq_tdrop++;
break;
case QM_MR_RC_ORPWINDOW_RETIRED:
percpu_priv->ern_cnt.fq_retired++;
break;
case QM_MR_RC_ORP_ZERO:
percpu_priv->ern_cnt.orp_zero++;
break;
}
}
static void egress_ern(struct qman_portal *portal,
struct qman_fq *fq,
const struct qm_mr_entry *msg)
{
struct net_device *net_dev;
const struct dpa_priv_s *priv;
struct sk_buff *skb;
struct dpa_percpu_priv_s *percpu_priv;
struct qm_fd fd = msg->ern.fd;
net_dev = ((struct dpa_fq *)fq)->net_dev;
priv = netdev_priv(net_dev);
/* Non-migratable context, safe to use __this_cpu_ptr */
percpu_priv = __this_cpu_ptr(priv->percpu_priv);
percpu_priv->stats.tx_dropped++;
percpu_priv->stats.tx_fifo_errors++;
count_ern(percpu_priv, msg);
/*
* If we intended this buffer to go into the pool
* when the FM was done, we need to put it in
* manually.
*/
if (msg->ern.fd.cmd & FM_FD_CMD_FCO) {
dpa_fd_release(net_dev, &fd);
return;
}
skb = _dpa_cleanup_tx_fd(priv, &fd);
dev_kfree_skb_any(skb);
}
static const dpa_fq_cbs_t private_fq_cbs = {
.rx_defq = { .cb = { .dqrr = ingress_rx_default_dqrr } },
.tx_defq = { .cb = { .dqrr = ingress_tx_default_dqrr } },
.rx_errq = { .cb = { .dqrr = ingress_rx_error_dqrr } },
.tx_errq = { .cb = { .dqrr = ingress_tx_error_dqrr } },
.egress_ern = { .cb = { .ern = egress_ern } }
};
int __cold dpa_start(struct net_device *net_dev)
{
int err, i;
struct dpa_priv_s *priv;
struct mac_device *mac_dev;
priv = netdev_priv(net_dev);
mac_dev = priv->mac_dev;
dpaa_eth_napi_enable(priv);
err = mac_dev->init_phy(net_dev);
if (err < 0) {
if (netif_msg_ifup(priv))
netdev_err(net_dev, "init_phy() = %d\n", err);
goto init_phy_failed;
}
for_each_port_device(i, mac_dev->port_dev)
fm_port_enable(mac_dev->port_dev[i]);
err = priv->mac_dev->start(mac_dev);
if (err < 0) {
if (netif_msg_ifup(priv))
netdev_err(net_dev, "mac_dev->start() = %d\n", err);
goto mac_start_failed;
}
netif_tx_start_all_queues(net_dev);
return 0;
mac_start_failed:
for_each_port_device(i, mac_dev->port_dev)
fm_port_disable(mac_dev->port_dev[i]);
init_phy_failed:
dpaa_eth_napi_disable(priv);
return err;
}
static int __cold dpa_eth_priv_start(struct net_device *net_dev)
{
int i;
struct dpa_priv_s *priv;
struct dpa_percpu_priv_s *percpu_priv;
priv = netdev_priv(net_dev);
/* Seed the global buffer pool at the first ifconfig up
* of a private port. Update the percpu buffer counters
* of each private interface.
*/
if (!default_pool_seeded) {
default_pool->size = default_buf_size;
dpa_make_private_pool(default_pool);
default_pool_seeded = true;
}
for_each_online_cpu(i) {
percpu_priv = per_cpu_ptr(priv->percpu_priv, i);
if (!percpu_priv->dpa_bp) {
percpu_priv->dpa_bp = priv->dpa_bp;
percpu_priv->dpa_bp_count =
per_cpu_ptr(priv->dpa_bp->percpu_count,
i);
}
}
return dpa_start(net_dev);
}
int __cold dpa_stop(struct net_device *net_dev)
{
int _errno, i;
struct dpa_priv_s *priv;
struct mac_device *mac_dev;
priv = netdev_priv(net_dev);
mac_dev = priv->mac_dev;
netif_tx_stop_all_queues(net_dev);
_errno = mac_dev->stop(mac_dev);
if (unlikely(_errno < 0))
if (netif_msg_ifdown(priv))
netdev_err(net_dev, "mac_dev->stop() = %d\n",
_errno);
for_each_port_device(i, mac_dev->port_dev)
fm_port_disable(mac_dev->port_dev[i]);
if (mac_dev->phy_dev)
phy_disconnect(mac_dev->phy_dev);
mac_dev->phy_dev = NULL;
return _errno;
}
static int __cold dpa_eth_priv_stop(struct net_device *net_dev)
{
int _errno;
struct dpa_priv_s *priv;
_errno = dpa_stop(net_dev);
priv = netdev_priv(net_dev);
dpaa_eth_napi_disable(priv);
return _errno;
}
void __cold dpa_timeout(struct net_device *net_dev)
{
const struct dpa_priv_s *priv;
struct dpa_percpu_priv_s *percpu_priv;
priv = netdev_priv(net_dev);
percpu_priv = per_cpu_ptr(priv->percpu_priv, smp_processor_id());
if (netif_msg_timer(priv))
netdev_crit(net_dev, "Transmit timeout latency: %u ms\n",
jiffies_to_msecs(jiffies - net_dev->trans_start));
percpu_priv->stats.tx_errors++;
}
#ifdef CONFIG_NET_POLL_CONTROLLER
static void dpaa_eth_poll_controller(struct net_device *net_dev)
{
struct dpa_priv_s *priv = netdev_priv(net_dev);
struct dpa_percpu_priv_s *percpu_priv =
this_cpu_ptr(priv->percpu_priv);
struct napi_struct napi = percpu_priv->napi;
qman_irqsource_remove(QM_PIRQ_DQRI);
qman_poll_dqrr(napi.weight);
qman_irqsource_add(QM_PIRQ_DQRI);
}
#endif
static int dpa_bp_cmp(const void *dpa_bp0, const void *dpa_bp1)
{
return ((struct dpa_bp *)dpa_bp0)->size -
((struct dpa_bp *)dpa_bp1)->size;
}
struct dpa_bp * __cold __must_check __attribute__((nonnull))
dpa_bp_probe(struct platform_device *_of_dev, size_t *count)
{
int i, lenp, na, ns;
struct device *dev;
struct device_node *dev_node;
const phandle *phandle_prop;
const uint32_t *bpid;
const uint32_t *bpool_cfg;
struct dpa_bp *dpa_bp;
int has_kernel_pool = 0;
int has_shared_pool = 0;
dev = &_of_dev->dev;
/* The default is one, if there's no property */
*count = 1;
/* There are three types of buffer pool configuration:
* 1) No bp assignment
* 2) A static assignment to an empty configuration
* 3) A static assignment to one or more configured pools
*
* We don't support using multiple unconfigured pools.
*/
/* Get the buffer pools to be used */
phandle_prop = of_get_property(dev->of_node,
"fsl,bman-buffer-pools", &lenp);
if (phandle_prop)
*count = lenp / sizeof(phandle);
else {
if (default_pool)
return default_pool;
has_kernel_pool = 1;
}
dpa_bp = devm_kzalloc(dev, *count * sizeof(*dpa_bp), GFP_KERNEL);
if (unlikely(dpa_bp == NULL)) {
dev_err(dev, "devm_kzalloc() failed\n");
return ERR_PTR(-ENOMEM);
}
dev_node = of_find_node_by_path("/");
if (unlikely(dev_node == NULL)) {
dev_err(dev, "of_find_node_by_path(/) failed\n");
return ERR_PTR(-EINVAL);
}
na = of_n_addr_cells(dev_node);
ns = of_n_size_cells(dev_node);
for (i = 0; i < *count && phandle_prop; i++) {
of_node_put(dev_node);
dev_node = of_find_node_by_phandle(phandle_prop[i]);
if (unlikely(dev_node == NULL)) {
dev_err(dev, "of_find_node_by_phandle() failed\n");
return ERR_PTR(-EFAULT);
}
if (unlikely(!of_device_is_compatible(dev_node, "fsl,bpool"))) {
dev_err(dev,
"!of_device_is_compatible(%s, fsl,bpool)\n",
dev_node->full_name);
dpa_bp = ERR_PTR(-EINVAL);
goto _return_of_node_put;
}
bpid = of_get_property(dev_node, "fsl,bpid", &lenp);
if ((bpid == NULL) || (lenp != sizeof(*bpid))) {
dev_err(dev, "fsl,bpid property not found.\n");
dpa_bp = ERR_PTR(-EINVAL);
goto _return_of_node_put;
}
dpa_bp[i].bpid = *bpid;
bpool_cfg = of_get_property(dev_node, "fsl,bpool-ethernet-cfg",
&lenp);
if (bpool_cfg && (lenp == (2 * ns + na) * sizeof(*bpool_cfg))) {
const uint32_t *seed_pool;
dpa_bp[i].config_count =
(int)of_read_number(bpool_cfg, ns);
dpa_bp[i].size = of_read_number(bpool_cfg + ns, ns);
dpa_bp[i].paddr =
of_read_number(bpool_cfg + 2 * ns, na);
seed_pool = of_get_property(dev_node,
"fsl,bpool-ethernet-seeds", &lenp);
dpa_bp[i].seed_pool = !!seed_pool;
has_shared_pool = 1;
} else {
has_kernel_pool = 1;
}
if (i > 0)
has_shared_pool = 1;
}
if (has_kernel_pool && has_shared_pool) {
dev_err(dev, "Invalid buffer pool configuration "
"for node %s\n", dev_node->full_name);
dpa_bp = ERR_PTR(-EINVAL);
goto _return_of_node_put;
} else if (has_kernel_pool) {
dpa_bp->target_count = CONFIG_FSL_DPAA_ETH_MAX_BUF_COUNT;
dpa_bp->kernel_pool = 1;
}
sort(dpa_bp, *count, sizeof(*dpa_bp), dpa_bp_cmp, NULL);
return dpa_bp;
_return_of_node_put:
if (dev_node)
of_node_put(dev_node);
return dpa_bp;
}
int dpa_bp_create(struct net_device *net_dev, struct dpa_bp *dpa_bp,
size_t count)
{
struct dpa_priv_s *priv = netdev_priv(net_dev);
int i;
if (dpa_bp->kernel_pool) {
priv->shared = 0;
if (netif_msg_probe(priv))
dev_info(net_dev->dev.parent,
"Using private BM buffer pools\n");
} else {
priv->shared = 1;
}
priv->dpa_bp = dpa_bp;
priv->bp_count = count;
for (i = 0; i < count; i++) {
int err;
err = dpa_bp_alloc(&dpa_bp[i]);
if (err < 0) {
dpa_bp_free(priv, dpa_bp);
priv->dpa_bp = NULL;
return err;
}
/* For now, just point to the default pool.
* We can add support for more pools, later
*/
if (dpa_bp->kernel_pool)
priv->dpa_bp = default_pool;
}
return 0;
}
struct mac_device * __cold __must_check
__attribute__((nonnull))
dpa_mac_probe(struct platform_device *_of_dev)
{
struct device *dpa_dev, *dev;
struct device_node *mac_node;
int lenp;
const phandle *phandle_prop;
struct platform_device *of_dev;
struct mac_device *mac_dev;
#ifdef CONFIG_FSL_DPAA_1588
struct net_device *net_dev = NULL;
struct dpa_priv_s *priv = NULL;
struct device_node *timer_node;
#endif
phandle_prop = of_get_property(_of_dev->dev.of_node,
"fsl,fman-mac", &lenp);
if (phandle_prop == NULL)
return NULL;
BUG_ON(lenp != sizeof(phandle));
dpa_dev = &_of_dev->dev;
mac_node = of_find_node_by_phandle(*phandle_prop);
if (unlikely(mac_node == NULL)) {
dev_err(dpa_dev, "of_find_node_by_phandle() failed\n");
return ERR_PTR(-EFAULT);
}
of_dev = of_find_device_by_node(mac_node);
if (unlikely(of_dev == NULL)) {
dev_err(dpa_dev, "of_find_device_by_node(%s) failed\n",
mac_node->full_name);
of_node_put(mac_node);
return ERR_PTR(-EINVAL);
}
of_node_put(mac_node);
dev = &of_dev->dev;
mac_dev = dev_get_drvdata(dev);
if (unlikely(mac_dev == NULL)) {
dev_err(dpa_dev, "dev_get_drvdata(%s) failed\n",
dev_name(dev));
return ERR_PTR(-EINVAL);
}
#ifdef CONFIG_FSL_DPAA_1588
phandle_prop = of_get_property(mac_node, "ptimer-handle", &lenp);
if (phandle_prop && ((mac_dev->phy_if != PHY_INTERFACE_MODE_SGMII) ||
((mac_dev->phy_if == PHY_INTERFACE_MODE_SGMII) &&
(mac_dev->speed == SPEED_1000)))) {
timer_node = of_find_node_by_phandle(*phandle_prop);
if (timer_node && (net_dev = dev_get_drvdata(dpa_dev))) {
priv = netdev_priv(net_dev);
if (!dpa_ptp_init(priv))
dev_info(dev, "%s: ptp 1588 is initialized.\n",
mac_node->full_name);
}
}
#endif
return mac_dev;
}
static const char fsl_qman_frame_queues[][25] = {
[RX] = "fsl,qman-frame-queues-rx",
[TX] = "fsl,qman-frame-queues-tx"
};
#ifdef CONFIG_FSL_DPAA_ETH_USE_NDO_SELECT_QUEUE
u16 dpa_select_queue(struct net_device *net_dev, struct sk_buff *skb)
{
return smp_processor_id();
}
#endif
netdev_features_t dpa_fix_features(struct net_device *dev,
netdev_features_t features)
{
netdev_features_t unsupported_features = 0;
/* In theory we should never be requested to enable features that
* we didn't set in netdev->features and netdev->hw_features at probe
* time, but double check just to be on the safe side.
* We don't support enabling Rx csum through ethtool yet
*/
unsupported_features |= NETIF_F_RXCSUM;
features &= ~unsupported_features;
return features;
}
int dpa_set_features(struct net_device *dev, netdev_features_t features)
{
/* Not much to do here for now */
dev->features = features;
return 0;
}
static const struct net_device_ops dpa_private_ops = {
.ndo_open = dpa_eth_priv_start,
.ndo_start_xmit = dpa_tx,
.ndo_stop = dpa_eth_priv_stop,
.ndo_tx_timeout = dpa_timeout,
.ndo_get_stats64 = dpa_get_stats64,
.ndo_set_mac_address = dpa_set_mac_address,
.ndo_validate_addr = eth_validate_addr,
#ifdef CONFIG_FSL_DPAA_ETH_USE_NDO_SELECT_QUEUE
.ndo_select_queue = dpa_select_queue,
#endif
.ndo_change_mtu = dpa_change_mtu,
.ndo_set_rx_mode = dpa_set_rx_mode,
.ndo_init = dpa_ndo_init,
.ndo_set_features = dpa_set_features,
.ndo_fix_features = dpa_fix_features,
.ndo_do_ioctl = dpa_ioctl,
#ifdef CONFIG_NET_POLL_CONTROLLER
.ndo_poll_controller = dpaa_eth_poll_controller,
#endif
};
static u32 rx_pool_channel;
static DEFINE_SPINLOCK(rx_pool_channel_init);
int dpa_get_channel(struct device *dev, struct device_node *dpa_node)
{
spin_lock(&rx_pool_channel_init);
if (!rx_pool_channel) {
u32 pool;
int ret = qman_alloc_pool(&pool);
if (!ret)
rx_pool_channel = pool;
}
spin_unlock(&rx_pool_channel_init);
if (!rx_pool_channel)
return -ENOMEM;
return rx_pool_channel;
}
static const struct fqid_cell default_fqids[][3] = {
[RX] = { {0, 1}, {0, 1}, {0, DPAA_ETH_RX_QUEUES} },
[TX] = { {0, 1}, {0, 1}, {0, DPAA_ETH_TX_QUEUES} }
};
static const struct fqid_cell tx_confirm_fqids[] = {
{0, DPAA_ETH_TX_QUEUES}
};
#ifdef CONFIG_FSL_DPAA_TX_RECYCLE
static const struct fqid_cell tx_recycle_fqids[] = {
{0, DPAA_ETH_TX_QUEUES}
};
#endif
struct dpa_fq *dpa_fq_alloc(struct device *dev,
const struct fqid_cell *fqids,
struct list_head *list,
enum dpa_fq_type fq_type)
{
int i;
struct dpa_fq *dpa_fq;
dpa_fq = devm_kzalloc(dev, sizeof(*dpa_fq) * fqids->count, GFP_KERNEL);
if (dpa_fq == NULL)
return NULL;
for (i = 0; i < fqids->count; i++) {
dpa_fq[i].fq_type = fq_type;
dpa_fq[i].fqid = fqids->start ? fqids->start + i : 0;
_dpa_assign_wq(dpa_fq + i);
list_add_tail(&dpa_fq[i].list, list);
}
return dpa_fq;
}
/* Probing of FQs for MACful ports */
int dpa_fq_probe_mac(struct device *dev, struct list_head *list,
struct fm_port_fqs *port_fqs,
bool tx_conf_fqs_per_core,
enum port_type ptype)
{
const struct fqid_cell *fqids;
struct dpa_fq *dpa_fq;
struct device_node *np = dev->of_node;
int num_ranges;
int i, lenp;
if (ptype == TX && tx_conf_fqs_per_core) {
/* Use per-core tx confirmation queues on private ports */
if (!dpa_fq_alloc(dev, tx_confirm_fqids, list,
FQ_TYPE_TX_CONF_MQ))
goto fq_alloc_failed;
#ifdef CONFIG_FSL_DPAA_TX_RECYCLE
/* per-core Tx queues for recyclable frames (FManv3 only) */
if (!dpa_fq_alloc(dev, tx_recycle_fqids, list,
FQ_TYPE_TX_RECYCLE))
goto fq_alloc_failed;
#endif
}
fqids = of_get_property(np, fsl_qman_frame_queues[ptype], &lenp);
if (fqids == NULL) {
/* No dts definition, so use the defaults. */
fqids = default_fqids[ptype];
num_ranges = 3;
} else {
num_ranges = lenp / sizeof(*fqids);
}
for (i = 0; i < num_ranges; i++) {
switch (i) {
case 0:
/* The first queue is the error queue */
if (fqids[i].count != 1)
goto invalid_error_queue;
dpa_fq = dpa_fq_alloc(dev, &fqids[i], list,
ptype == RX ?
FQ_TYPE_RX_ERROR :
FQ_TYPE_TX_ERROR);
if (dpa_fq == NULL)
goto fq_alloc_failed;
if (ptype == RX)
port_fqs->rx_errq = &dpa_fq[0];
else
port_fqs->tx_errq = &dpa_fq[0];
break;
case 1:
/* the second queue is the default queue */
if (fqids[i].count != 1)
goto invalid_default_queue;
dpa_fq = dpa_fq_alloc(dev, &fqids[i], list,
ptype == RX ?
FQ_TYPE_RX_DEFAULT :
FQ_TYPE_TX_CONFIRM);
if (dpa_fq == NULL)
goto fq_alloc_failed;
if (ptype == RX)
port_fqs->rx_defq = &dpa_fq[0];
else
port_fqs->tx_defq = &dpa_fq[0];
break;
default:
/* all subsequent queues are either RX PCD or Tx */
if (!dpa_fq_alloc(dev, &fqids[i], list, ptype == RX ?
FQ_TYPE_RX_PCD : FQ_TYPE_TX))
goto fq_alloc_failed;
break;
}
}
return 0;
fq_alloc_failed:
dev_err(dev, "dpa_fq_alloc() failed\n");
return -ENOMEM;
invalid_default_queue:
invalid_error_queue:
dev_err(dev, "Too many default or error queues\n");
return -EINVAL;
}
static inline void dpa_setup_ingress(const struct dpa_priv_s *priv,
struct dpa_fq *fq,
const struct qman_fq *template)
{
fq->fq_base = *template;
fq->net_dev = priv->net_dev;
fq->flags = QMAN_FQ_FLAG_NO_ENQUEUE;
fq->channel = priv->channel;
}
static inline void dpa_setup_egress(const struct dpa_priv_s *priv,
struct dpa_fq *fq,
struct fm_port *port,
const struct qman_fq *template)
{
fq->fq_base = *template;
fq->net_dev = priv->net_dev;
if (port) {
fq->flags = QMAN_FQ_FLAG_TO_DCPORTAL;
fq->channel = fm_get_tx_port_channel(port);
} else {
fq->flags = QMAN_FQ_FLAG_NO_MODIFY;
}
}
static void
dpaa_eth_init_tx_port(struct fm_port *port, struct dpa_fq *errq,
struct dpa_fq *defq, struct dpa_buffer_layout_s *buf_layout)
{
struct fm_port_params tx_port_param;
bool frag_enabled = false;
memset(&tx_port_param, 0, sizeof(tx_port_param));
dpaa_eth_init_port(tx, port, tx_port_param, errq->fqid, defq->fqid,
buf_layout, frag_enabled);
}
static void
dpaa_eth_init_rx_port(struct fm_port *port, struct dpa_bp *bp, size_t count,
struct dpa_fq *errq, struct dpa_fq *defq,
struct dpa_buffer_layout_s *buf_layout)
{
struct fm_port_params rx_port_param;
int i;
bool frag_enabled = false;
memset(&rx_port_param, 0, sizeof(rx_port_param));
count = min(ARRAY_SIZE(rx_port_param.pool_param), count);
rx_port_param.num_pools = count;
for (i = 0; i < count; i++) {
if (i >= rx_port_param.num_pools)
break;
rx_port_param.pool_param[i].id = bp[i].bpid;
rx_port_param.pool_param[i].size = bp[i].size;
}
dpaa_eth_init_port(rx, port, rx_port_param, errq->fqid, defq->fqid,
buf_layout, frag_enabled);
}
int dpa_alloc_pcd_fqids(struct device *dev, uint32_t num,
uint8_t alignment, uint32_t *base_fqid)
{
dev_crit(dev, "callback not implemented!\n");
BUG();
return 0;
}
int dpa_free_pcd_fqids(struct device *dev, uint32_t base_fqid)
{
dev_crit(dev, "callback not implemented!\n");
BUG();
return 0;
}
void dpaa_eth_init_ports(struct mac_device *mac_dev,
struct dpa_bp *bp, size_t count,
struct fm_port_fqs *port_fqs,
struct dpa_buffer_layout_s *buf_layout,
struct device *dev)
{
struct fm_port_pcd_param rx_port_pcd_param;
struct fm_port *rxport = mac_dev->port_dev[RX];
struct fm_port *txport = mac_dev->port_dev[TX];
dpaa_eth_init_tx_port(txport, port_fqs->tx_errq,
port_fqs->tx_defq, &buf_layout[TX]);
dpaa_eth_init_rx_port(rxport, bp, count, port_fqs->rx_errq,
port_fqs->rx_defq, &buf_layout[RX]);
rx_port_pcd_param.cba = dpa_alloc_pcd_fqids;
rx_port_pcd_param.cbf = dpa_free_pcd_fqids;
rx_port_pcd_param.dev = dev;
fm_port_pcd_bind(rxport, &rx_port_pcd_param);
}
void dpa_fq_setup(struct dpa_priv_s *priv, const dpa_fq_cbs_t *fq_cbs,
struct fm_port *tx_port)
{
struct dpa_fq *fq;
int portals[NR_CPUS];
int cpu, portal_cnt = 0, num_portals = 0;
uint32_t pcd_fqid;
const cpumask_t *affine_cpus = qman_affine_cpus();
int egress_cnt = 0, conf_cnt = 0;
#ifdef CONFIG_FSL_DPAA_TX_RECYCLE
int recycle_cnt = 0;
#endif
/* Prepare for PCD FQs init */
for_each_cpu(cpu, affine_cpus)
portals[num_portals++] = qman_affine_channel(cpu);
if (num_portals == 0)
dev_err(priv->net_dev->dev.parent,
"No Qman software (affine) channels found");
pcd_fqid = (priv->mac_dev) ?
DPAA_ETH_PCD_FQ_BASE(priv->mac_dev->res->start) : 0;
/* Initialize each FQ in the list */
list_for_each_entry(fq, &priv->dpa_fq_list, list) {
switch (fq->fq_type) {
case FQ_TYPE_RX_DEFAULT:
BUG_ON(!priv->mac_dev);
dpa_setup_ingress(priv, fq, &fq_cbs->rx_defq);
break;
case FQ_TYPE_RX_ERROR:
BUG_ON(!priv->mac_dev);
dpa_setup_ingress(priv, fq, &fq_cbs->rx_errq);
break;
case FQ_TYPE_RX_PCD:
/* For MACless we can't have dynamic Rx queues */
BUG_ON(!priv->mac_dev && !fq->fqid);
dpa_setup_ingress(priv, fq, &fq_cbs->rx_defq);
if (!fq->fqid)
fq->fqid = pcd_fqid++;
fq->channel = portals[portal_cnt];
portal_cnt = (portal_cnt + 1) % num_portals;
break;
case FQ_TYPE_TX:
dpa_setup_egress(priv, fq, tx_port,
&fq_cbs->egress_ern);
/* If we have more Tx queues than the number of cores,
* just ignore the extra ones.
*/
if (egress_cnt < DPAA_ETH_TX_QUEUES)
priv->egress_fqs[egress_cnt++] = &fq->fq_base;
break;
case FQ_TYPE_TX_CONFIRM:
BUG_ON(!priv->mac_dev);
dpa_setup_ingress(priv, fq, &fq_cbs->tx_defq);
break;
case FQ_TYPE_TX_CONF_MQ:
BUG_ON(!priv->mac_dev);
BUG_ON(priv->shared);
dpa_setup_ingress(priv, fq, &fq_cbs->tx_defq);
priv->conf_fqs[conf_cnt++] = &fq->fq_base;
break;
case FQ_TYPE_TX_ERROR:
BUG_ON(!priv->mac_dev);
dpa_setup_ingress(priv, fq, &fq_cbs->tx_errq);
break;
#ifdef CONFIG_FSL_DPAA_TX_RECYCLE
case FQ_TYPE_TX_RECYCLE:
BUG_ON(!priv->mac_dev);
BUG_ON(priv->shared);
dpa_setup_egress(priv, fq, tx_port,
&fq_cbs->egress_ern);
priv->recycle_fqs[recycle_cnt++] = &fq->fq_base;
break;
#endif
default:
dev_warn(priv->net_dev->dev.parent,
"Unknown FQ type detected!\n");
break;
}
}
/* The number of Tx queues may be smaller than the number of cores, if
* the Tx queue range is specified in the device tree instead of being
* dynamically allocated.
* Make sure all CPUs receive a corresponding Tx queue.
*/
while (egress_cnt < DPAA_ETH_TX_QUEUES) {
list_for_each_entry(fq, &priv->dpa_fq_list, list) {
if (fq->fq_type != FQ_TYPE_TX)
continue;
priv->egress_fqs[egress_cnt++] = &fq->fq_base;
if (egress_cnt == DPAA_ETH_TX_QUEUES)
break;
}
}
}
int dpa_netdev_init(struct device_node *dpa_node,
struct net_device *net_dev, const uint8_t *mac_addr)
{
int err;
struct dpa_priv_s *priv = netdev_priv(net_dev);
struct device *dev = net_dev->dev.parent;
net_dev->hw_features |= DPA_NETIF_FEATURES;
net_dev->priv_flags |= IFF_LIVE_ADDR_CHANGE;
net_dev->features |= net_dev->hw_features;
net_dev->vlan_features = net_dev->features;
memcpy(net_dev->perm_addr, mac_addr, net_dev->addr_len);
memcpy(net_dev->dev_addr, mac_addr, net_dev->addr_len);
SET_ETHTOOL_OPS(net_dev, &dpa_ethtool_ops);
net_dev->needed_headroom = priv->tx_headroom;
net_dev->watchdog_timeo = msecs_to_jiffies(tx_timeout);
err = register_netdev(net_dev);
if (err < 0) {
dev_err(dev, "register_netdev() = %d\n", err);
return err;
}
#ifdef CONFIG_FSL_DPAA_ETH_DEBUGFS
/* create debugfs entry for this net_device */
err = dpa_netdev_debugfs_create(net_dev);
if (err) {
unregister_netdev(net_dev);
return err;
}
#endif /* CONFIG_FSL_DPAA_ETH_DEBUGFS */
return 0;
}
static int dpa_private_netdev_init(struct device_node *dpa_node,
struct net_device *net_dev)
{
int i;
struct dpa_priv_s *priv = netdev_priv(net_dev);
struct dpa_percpu_priv_s *percpu_priv;
const uint8_t *mac_addr;
/*
* Although we access another CPU's private data here
* we do it at initialization so it is safe
*/
for_each_online_cpu(i) {
percpu_priv = per_cpu_ptr(priv->percpu_priv, i);
percpu_priv->net_dev = net_dev;
netif_napi_add(net_dev, &percpu_priv->napi, dpaa_eth_poll,
DPA_NAPI_WEIGHT);
}
net_dev->netdev_ops = &dpa_private_ops;
mac_addr = priv->mac_dev->addr;
net_dev->mem_start = priv->mac_dev->res->start;
net_dev->mem_end = priv->mac_dev->res->end;
net_dev->hw_features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
NETIF_F_LLTX);
#ifdef CONFIG_FSL_DPAA_ETH_SG_SUPPORT
/* Advertise S/G and HIGHDMA support for private interfaces */
net_dev->hw_features |= NETIF_F_SG | NETIF_F_HIGHDMA;
/* Recent kernels enable GSO automatically, if
* we declare NETIF_F_SG. For conformity, we'll
* still declare GSO explicitly.
*/
net_dev->features |= NETIF_F_GSO;
#endif
/* Advertise GRO support */
net_dev->features |= NETIF_F_GRO;
return dpa_netdev_init(dpa_node, net_dev, mac_addr);
}
int dpaa_eth_add_channel(void *__arg)
{
const cpumask_t *cpus = qman_affine_cpus();
u32 pool = QM_SDQCR_CHANNELS_POOL_CONV((u32)(unsigned long)__arg);
int cpu;
for_each_cpu(cpu, cpus) {
set_cpus_allowed_ptr(current, get_cpu_mask(cpu));
qman_static_dequeue_add(pool);
}
return 0;
}
int dpaa_eth_cgr_init(struct dpa_priv_s *priv)
{
struct qm_mcc_initcgr initcgr;
u32 cs_th;
int err;
err = qman_alloc_cgrid(&priv->cgr_data.cgr.cgrid);
if (err < 0) {
pr_err("Error %d allocating CGR ID\n", err);
goto out_error;
}
priv->cgr_data.cgr.cb = dpaa_eth_cgscn;
/* Enable Congestion State Change Notifications and CS taildrop */
initcgr.we_mask = QM_CGR_WE_CSCN_EN | QM_CGR_WE_CS_THRES;
initcgr.cgr.cscn_en = QM_CGR_EN;
/*
* Set different thresholds based on the MAC speed.
* TODO: this may turn suboptimal if the MAC is reconfigured at a speed
* lower than its max, e.g. if a dTSEC later negotiates a 100Mbps link.
* In such cases, we ought to reconfigure the threshold, too.
*/
if (priv->mac_dev->if_support & SUPPORTED_10000baseT_Full)
cs_th = DPA_CS_THRESHOLD_10G;
else
cs_th = DPA_CS_THRESHOLD_1G;
qm_cgr_cs_thres_set64(&initcgr.cgr.cs_thres, cs_th, 1);
initcgr.we_mask |= QM_CGR_WE_CSTD_EN;
initcgr.cgr.cstd_en = QM_CGR_EN;
err = qman_create_cgr(&priv->cgr_data.cgr, QMAN_CGR_FLAG_USE_INIT,
&initcgr);
if (err < 0) {
pr_err("Error %d creating CGR with ID %d\n", err,
priv->cgr_data.cgr.cgrid);
qman_release_cgrid(priv->cgr_data.cgr.cgrid);
goto out_error;
}
pr_debug("Created CGR %d for netdev with hwaddr %pM on "
"QMan channel %d\n", priv->cgr_data.cgr.cgrid,
priv->mac_dev->addr, priv->cgr_data.cgr.chan);
out_error:
return err;
}
static const struct of_device_id dpa_match[];
static int
dpaa_eth_priv_probe(struct platform_device *_of_dev)
{
int err = 0, i;
struct device *dev;
struct device_node *dpa_node;
struct dpa_bp *dpa_bp;
struct dpa_fq *dpa_fq, *tmp;
size_t count;
struct net_device *net_dev = NULL;
struct dpa_priv_s *priv = NULL;
struct dpa_percpu_priv_s *percpu_priv;
struct fm_port_fqs port_fqs;
struct dpa_buffer_layout_s *buf_layout = NULL;
struct mac_device *mac_dev;
struct task_struct *kth;
dev = &_of_dev->dev;
dpa_node = dev->of_node;
if (!of_device_is_available(dpa_node))
return -ENODEV;
/* Get the buffer pools assigned to this interface */
dpa_bp = dpa_bp_probe(_of_dev, &count);
if (IS_ERR(dpa_bp))
return PTR_ERR(dpa_bp);
/*
* Allocate this early, so we can store relevant information in
* the private area (needed by 1588 code in dpa_mac_probe)
*/
net_dev = alloc_etherdev_mq(sizeof(*priv), DPAA_ETH_TX_QUEUES);
if (!net_dev) {
dev_err(dev, "alloc_etherdev_mq() failed\n");
return -ENOMEM;
}
/* Do this here, so we can be verbose early */
SET_NETDEV_DEV(net_dev, dev);
dev_set_drvdata(dev, net_dev);
priv = netdev_priv(net_dev);
priv->net_dev = net_dev;
priv->msg_enable = netif_msg_init(debug, -1);
mac_dev = dpa_mac_probe(_of_dev);
if (IS_ERR(mac_dev) || !mac_dev) {
err = PTR_ERR(mac_dev);
goto mac_probe_failed;
}
/* We have physical ports, so we need to establish
* the buffer layout.
*/
buf_layout = devm_kzalloc(dev, 2 * sizeof(*buf_layout),
GFP_KERNEL);
if (!buf_layout) {
dev_err(dev, "devm_kzalloc() failed\n");
goto alloc_failed;
}
dpa_set_buffers_layout(mac_dev, buf_layout);
/* For private ports, need to compute the size of the default
* buffer pool, based on FMan port buffer layout;also update
* the maximum buffer size for private ports if necessary
*/
dpa_bp->size = dpa_bp_size(&buf_layout[RX]);
if (dpa_bp->size > default_buf_size)
default_buf_size = dpa_bp->size;
INIT_LIST_HEAD(&priv->dpa_fq_list);
memset(&port_fqs, 0, sizeof(port_fqs));
err = dpa_fq_probe_mac(dev, &priv->dpa_fq_list, &port_fqs, true, RX);
if (!err)
err = dpa_fq_probe_mac(dev, &priv->dpa_fq_list,
&port_fqs, true, TX);
if (err < 0)
goto fq_probe_failed;
/* bp init */
err = dpa_bp_create(net_dev, dpa_bp, count);
if (err < 0)
goto bp_create_failed;
priv->mac_dev = mac_dev;
priv->channel = dpa_get_channel(dev, dpa_node);
if (priv->channel < 0) {
err = priv->channel;
goto get_channel_failed;
}
/* Start a thread that will walk the cpus with affine portals
* and add this pool channel to each's dequeue mask.
*/
kth = kthread_run(dpaa_eth_add_channel,
(void *)(unsigned long)priv->channel,
"dpaa_%p:%d", net_dev, priv->channel);
if (!kth) {
err = -ENOMEM;
goto add_channel_failed;
}
dpa_fq_setup(priv, &private_fq_cbs, priv->mac_dev->port_dev[TX]);
/*
* Create a congestion group for this netdev, with
* dynamically-allocated CGR ID.
* Must be executed after probing the MAC, but before
* assigning the egress FQs to the CGRs.
*/
err = dpaa_eth_cgr_init(priv);
if (err < 0) {
dev_err(dev, "Error initializing CGR\n");
goto cgr_init_failed;
}
/* Add the FQs to the interface, and make them active */
list_for_each_entry_safe(dpa_fq, tmp, &priv->dpa_fq_list, list) {
err = dpa_fq_init(dpa_fq, false);
if (err < 0)
goto fq_alloc_failed;
}
priv->buf_layout = buf_layout;
priv->tx_headroom =
dpa_get_headroom(&priv->buf_layout[TX]);
/* All real interfaces need their ports initialized */
dpaa_eth_init_ports(mac_dev, dpa_bp, count, &port_fqs,
buf_layout, dev);
priv->percpu_priv = alloc_percpu(*priv->percpu_priv);
if (priv->percpu_priv == NULL) {
dev_err(dev, "alloc_percpu() failed\n");
err = -ENOMEM;
goto alloc_percpu_failed;
}
for_each_online_cpu(i) {
percpu_priv = per_cpu_ptr(priv->percpu_priv, i);
memset(percpu_priv, 0, sizeof(*percpu_priv));
}
err = dpa_private_netdev_init(dpa_node, net_dev);
if (err < 0)
goto netdev_init_failed;
dpaa_eth_sysfs_init(&net_dev->dev);
printk(KERN_INFO "fsl_dpa: Probed interface %s\n", net_dev->name);
#ifdef CONFIG_FSL_DPAA_ETH_UNIT_TESTS
/* The unit test is designed to test private interfaces */
dpa_unit_tests(net_dev);
#endif
return 0;
netdev_init_failed:
if (net_dev)
free_percpu(priv->percpu_priv);
alloc_percpu_failed:
fq_alloc_failed:
if (net_dev) {
dpa_fq_free(dev, &priv->dpa_fq_list);
qman_release_cgrid(priv->cgr_data.cgr.cgrid);
qman_delete_cgr(&priv->cgr_data.cgr);
}
cgr_init_failed:
add_channel_failed:
get_channel_failed:
if (net_dev)
dpa_bp_free(priv, priv->dpa_bp);
bp_create_failed:
fq_probe_failed:
devm_kfree(dev, buf_layout);
alloc_failed:
mac_probe_failed:
dev_set_drvdata(dev, NULL);
if (net_dev)
free_netdev(net_dev);
return err;
}
static const struct of_device_id dpa_match[] = {
{
.compatible = "fsl,dpa-ethernet"
},
{}
};
MODULE_DEVICE_TABLE(of, dpa_match);
int __cold dpa_remove(struct platform_device *of_dev)
{
int err;
struct device *dev;
struct net_device *net_dev;
struct dpa_priv_s *priv;
dev = &of_dev->dev;
net_dev = dev_get_drvdata(dev);
priv = netdev_priv(net_dev);
dpaa_eth_sysfs_remove(dev);
dev_set_drvdata(dev, NULL);
unregister_netdev(net_dev);
err = dpa_fq_free(dev, &priv->dpa_fq_list);
free_percpu(priv->percpu_priv);
dpa_bp_free(priv, priv->dpa_bp);
if (priv->buf_layout)
devm_kfree(dev, priv->buf_layout);
#ifdef CONFIG_FSL_DPAA_ETH_DEBUGFS
/* remove debugfs entry for this net_device */
dpa_netdev_debugfs_remove(net_dev);
#endif /* CONFIG_FSL_DPAA_ETH_DEBUGFS */
#ifdef CONFIG_FSL_DPAA_1588
if (priv->tsu && priv->tsu->valid)
dpa_ptp_cleanup(priv);
#endif
free_netdev(net_dev);
return err;
}
static struct platform_driver dpa_driver = {
.driver = {
.name = KBUILD_MODNAME,
.of_match_table = dpa_match,
.owner = THIS_MODULE,
},
.probe = dpaa_eth_priv_probe,
.remove = dpa_remove
};
static int __init __cold dpa_load(void)
{
int _errno;
printk(KERN_INFO KBUILD_MODNAME ": " DPA_DESCRIPTION " (" VERSION ")\n");
/* initialise dpaa_eth mirror values */
dpa_rx_extra_headroom = fm_get_rx_extra_headroom();
dpa_max_frm = fm_get_max_frm();
_errno = platform_driver_register(&dpa_driver);
if (unlikely(_errno < 0)) {
pr_err(KBUILD_MODNAME
": %s:%hu:%s(): platform_driver_register() = %d\n",
KBUILD_BASENAME".c", __LINE__, __func__, _errno);
}
pr_debug(KBUILD_MODNAME ": %s:%s() ->\n",
KBUILD_BASENAME".c", __func__);
return _errno;
}
module_init(dpa_load);
static void __exit __cold dpa_unload(void)
{
pr_debug(KBUILD_MODNAME ": -> %s:%s()\n",
KBUILD_BASENAME".c", __func__);
platform_driver_unregister(&dpa_driver);
pr_debug(KBUILD_MODNAME ": %s:%s() ->\n",
KBUILD_BASENAME".c", __func__);
}
module_exit(dpa_unload);
|