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| author | Wolfram Sang <wsa+renesas@sang-engineering.com> | 2016-06-06 16:08:25 (GMT) |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2016-06-10 07:00:19 (GMT) |
| commit | 8775306dcf48092ff9520463699f8fb373ceb57e (patch) | |
| tree | 0eb508dcb23e771a0a3234539fb0332341c49d3f /.mailmap | |
| parent | 1a695a905c18548062509178b98bc91e67510864 (diff) | |
| download | linux-8775306dcf48092ff9520463699f8fb373ceb57e.tar.xz | |
pinctrl: sh-pfc: refactor voltage setting
All known hardware being able to switch voltages has the same POCCTRL
register. So, factor out the common code to the core and keep only
the pin-to-bit mapping SoC specific. Convert the only user, r8a7790.
In case POCCTRL should ever get more complex (more voltages to select?),
we should probably switch over to a describing array like drive strength
does currently.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to '.mailmap')
0 files changed, 0 insertions, 0 deletions