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| author | Alistair Popple <alistair@popple.id.au> | 2016-01-11 05:53:50 (GMT) |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2016-01-11 09:30:52 (GMT) |
| commit | 08f48f3234a79bca86c2283a166aec83bf52b265 (patch) | |
| tree | 4002c5d6049c568989b039def994ae7831a78ce6 | |
| parent | b521549a09ddfac3bed38e261168cda92d04ce81 (diff) | |
| download | linux-08f48f3234a79bca86c2283a166aec83bf52b265.tar.xz | |
powerpc/powernv: Reserve PE#0 on NPU
P8+ hardware reports all errors on PE#0. This patch ensures PE#0 is
not assigned to NPU devices so that it can be used for EEH.
Signed-off-by: Alistair Popple <alistair@popple.id.au>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
| -rw-r--r-- | arch/powerpc/platforms/powernv/pci-ioda.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c index 0b62527..573ae19 100644 --- a/arch/powerpc/platforms/powernv/pci-ioda.c +++ b/arch/powerpc/platforms/powernv/pci-ioda.c @@ -1186,9 +1186,11 @@ static void pnv_pci_ioda_setup_PEs(void) * functions. PCI bus dependent PEs are required for the * remaining types of PHBs. */ - if (phb->type == PNV_PHB_NPU) + if (phb->type == PNV_PHB_NPU) { + /* PE#0 is needed for error reporting */ + pnv_ioda_reserve_pe(phb, 0); pnv_ioda_setup_npu_PEs(hose->bus); - else + } else pnv_ioda_setup_PEs(hose->bus); } } |