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authorQianqian Xie <xieqianqian@huawei.com>2016-06-21 03:56:21 (GMT)
committerDavid S. Miller <davem@davemloft.net>2016-06-21 08:51:54 (GMT)
commit0b03fd8528f7bf00b5c058212d69f92cf123bf30 (patch)
tree2f03e7c83cc604cd6d4154883faab325fb3fc9f9
parent4906ce45978ca958da687d6706a9ee85162ef69d (diff)
downloadlinux-0b03fd8528f7bf00b5c058212d69f92cf123bf30.tar.xz
net: hns: bug fix of ge reset sequence
The bit fileds of PPE reset register are different between HNS v1 and HNS v2, but the current procedure just only match HNS v1. Here is a patch to fix it. Signed-off-by: Kejian Yan <yankejian@huawei.com> Signed-off-by: Qianqian Xie <xieqianqian@huawei.com> Signed-off-by: Yisen Zhuang <Yisen.Zhuang@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c
index 96cb628..09e60d6 100644
--- a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c
+++ b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c
@@ -271,7 +271,11 @@ static void hns_dsaf_ge_srst_by_port(struct dsaf_device *dsaf_dev, u32 port,
}
} else {
reg_val_1 = 0x15540 << dsaf_dev->reset_offset;
- reg_val_2 = 0x100 << dsaf_dev->reset_offset;
+
+ if (AE_IS_VER1(dsaf_dev->dsaf_ver))
+ reg_val_2 = 0x100 << dsaf_dev->reset_offset;
+ else
+ reg_val_2 = 0x40 << dsaf_dev->reset_offset;
if (!dereset) {
dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_GE_RESET_REQ1_REG,