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authorJason Gunthorpe <jgunthorpe@obsidianresearch.com>2012-11-21 07:19:06 (GMT)
committerJason Cooper <jason@lakedaemon.net>2012-11-21 18:30:08 (GMT)
commit1dc831bf53fddcc6443f74a39e72db5bcea4f15d (patch)
treeaadc32c5b64b6a4ae6733a71bc2335510d42275d
parentd356cf5a74afa32b40decca3c9dd88bc3cd63eb5 (diff)
downloadlinux-1dc831bf53fddcc6443f74a39e72db5bcea4f15d.tar.xz
ARM: Kirkwood: Update PCI-E fixup
- The code relies on rc_pci_fixup being called, which only happens when CONFIG_PCI_QUIRKS is enabled, so add that to Kconfig. Omitting this causes a booting failure with a non-obvious cause. - Update rc_pci_fixup to set the class properly, copying the more modern style from other places - Correct the rc_pci_fixup comment Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> Cc: stable@vger.kernel.org Signed-off-by: Jason Cooper <jason@lakedaemon.net>
-rw-r--r--arch/arm/Kconfig1
-rw-r--r--arch/arm/mach-kirkwood/pcie.c11
2 files changed, 9 insertions, 3 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index ade7e92..9759fec 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -547,6 +547,7 @@ config ARCH_KIRKWOOD
select CPU_FEROCEON
select GENERIC_CLOCKEVENTS
select PCI
+ select PCI_QUIRKS
select PLAT_ORION_LEGACY
help
Support for the following Marvell Kirkwood series SoCs:
diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c
index ec54491..74fc5a0 100644
--- a/arch/arm/mach-kirkwood/pcie.c
+++ b/arch/arm/mach-kirkwood/pcie.c
@@ -207,14 +207,19 @@ static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
return 1;
}
+/*
+ * The root complex has a hardwired class of PCI_CLASS_MEMORY_OTHER, when it
+ * is operating as a root complex this needs to be switched to
+ * PCI_CLASS_BRIDGE_HOST or Linux will errantly try to process the BAR's on
+ * the device. Decoding setup is handled by the orion code.
+ */
static void __devinit rc_pci_fixup(struct pci_dev *dev)
{
- /*
- * Prevent enumeration of root complex.
- */
if (dev->bus->parent == NULL && dev->devfn == 0) {
int i;
+ dev->class &= 0xff;
+ dev->class |= PCI_CLASS_BRIDGE_HOST << 8;
for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
dev->resource[i].start = 0;
dev->resource[i].end = 0;