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author | Thomas Gleixner <tglx@linutronix.de> | 2011-03-25 11:12:26 (GMT) |
---|---|---|
committer | Samuel Ortiz <sameo@linux.intel.com> | 2011-03-26 23:09:40 (GMT) |
commit | 52a7d60775aa447b3a3dc685b7006f7cdc7835dd (patch) | |
tree | 1cc03d7e782569a666ac90f1e869dbfacce1a41d | |
parent | fc498fa29c725a0f0fc5ed359db0e3ed33f4ed52 (diff) | |
download | linux-52a7d60775aa447b3a3dc685b7006f7cdc7835dd.tar.xz |
mfd: asic3: Cleanup irq handling
Remove the open coded access to irq_desc and use the proper wrappers.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
-rw-r--r-- | drivers/mfd/asic3.c | 17 |
1 files changed, 6 insertions, 11 deletions
diff --git a/drivers/mfd/asic3.c b/drivers/mfd/asic3.c index 0241f08..652bde5 100644 --- a/drivers/mfd/asic3.c +++ b/drivers/mfd/asic3.c @@ -139,13 +139,12 @@ static void asic3_irq_flip_edge(struct asic3 *asic, static void asic3_irq_demux(unsigned int irq, struct irq_desc *desc) { + struct asic3 *asic = irq_desc_get_handler_data(desc); + struct irq_data *data = irq_desc_get_irq_data(desc); int iter, i; unsigned long flags; - struct asic3 *asic; - - desc->irq_data.chip->irq_ack(&desc->irq_data); - asic = get_irq_data(irq); + data->chip->irq_ack(irq_data); for (iter = 0 ; iter < MAX_ASIC_ISR_LOOPS; iter++) { u32 status; @@ -188,8 +187,7 @@ static void asic3_irq_demux(unsigned int irq, struct irq_desc *desc) irqnr = asic->irq_base + (ASIC3_GPIOS_PER_BANK * bank) + i; - desc = irq_to_desc(irqnr); - desc->handle_irq(irqnr, desc); + generic_handle_irq(irqnr); if (asic->irq_bothedge[bank] & bit) asic3_irq_flip_edge(asic, base, bit); @@ -200,11 +198,8 @@ static void asic3_irq_demux(unsigned int irq, struct irq_desc *desc) /* Handle remaining IRQs in the status register */ for (i = ASIC3_NUM_GPIOS; i < ASIC3_NR_IRQS; i++) { /* They start at bit 4 and go up */ - if (status & (1 << (i - ASIC3_NUM_GPIOS + 4))) { - desc = irq_to_desc(asic->irq_base + i); - desc->handle_irq(asic->irq_base + i, - desc); - } + if (status & (1 << (i - ASIC3_NUM_GPIOS + 4))) + generic_handle_irq(asic->irq_base + i); } } |