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author | Olof Johansson <olof@lixom.net> | 2015-12-22 21:06:15 (GMT) |
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committer | Olof Johansson <olof@lixom.net> | 2015-12-22 21:06:15 (GMT) |
commit | 9cdac4a20a963d946f3ce13e6dd4943a780f5b54 (patch) | |
tree | 81b0ed886ab6e9828b4dabd16167dc360c2a4522 | |
parent | f877df2bcf916ce76851b0f0a669512aa8183446 (diff) | |
parent | 2608224c81a7d242a9b451b97011410b182f0da7 (diff) | |
download | linux-9cdac4a20a963d946f3ce13e6dd4943a780f5b54.tar.xz |
Merge tag 'v4.5-rockchip-soc-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/soc
SMP special case for the rk3036 and addition of the rk3228
quad-core Cortex-A7 cpu.
* tag 'v4.5-rockchip-soc-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: rockchip: enable support for RK3228 SoCs
ARM: rockchip: use const and __initconst for rk3036 smp_operations
ARM: rockchip: add support smp for rk3036
Signed-off-by: Olof Johansson <olof@lixom.net>
-rw-r--r-- | Documentation/devicetree/bindings/arm/cpus.txt | 1 | ||||
-rw-r--r-- | arch/arm/mach-rockchip/platsmp.c | 45 | ||||
-rw-r--r-- | arch/arm/mach-rockchip/rockchip.c | 1 |
3 files changed, 35 insertions, 12 deletions
diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt index 3a07a87..8fb0749 100644 --- a/Documentation/devicetree/bindings/arm/cpus.txt +++ b/Documentation/devicetree/bindings/arm/cpus.txt @@ -200,6 +200,7 @@ nodes to be present and contain the properties described below. "qcom,gcc-msm8660" "qcom,kpss-acc-v1" "qcom,kpss-acc-v2" + "rockchip,rk3036-smp" "rockchip,rk3066-smp" "ste,dbx500-smp" diff --git a/arch/arm/mach-rockchip/platsmp.c b/arch/arm/mach-rockchip/platsmp.c index 3e7a4b7..9a5b2e0 100644 --- a/arch/arm/mach-rockchip/platsmp.c +++ b/arch/arm/mach-rockchip/platsmp.c @@ -42,6 +42,7 @@ static int ncores; #define PMU_PWRDN_SCU 4 static struct regmap *pmu; +static int has_pmu = true; static int pmu_power_domain_is_on(int pd) { @@ -89,20 +90,23 @@ static int pmu_set_power_domain(int pd, bool on) if (!IS_ERR(rstc) && !on) reset_control_assert(rstc); - ret = regmap_update_bits(pmu, PMU_PWRDN_CON, BIT(pd), val); - if (ret < 0) { - pr_err("%s: could not update power domain\n", __func__); - return ret; - } - - ret = -1; - while (ret != on) { - ret = pmu_power_domain_is_on(pd); + if (has_pmu) { + ret = regmap_update_bits(pmu, PMU_PWRDN_CON, BIT(pd), val); if (ret < 0) { - pr_err("%s: could not read power domain state\n", + pr_err("%s: could not update power domain\n", __func__); return ret; } + + ret = -1; + while (ret != on) { + ret = pmu_power_domain_is_on(pd); + if (ret < 0) { + pr_err("%s: could not read power domain state\n", + __func__); + return ret; + } + } } if (!IS_ERR(rstc)) { @@ -122,7 +126,7 @@ static int rockchip_boot_secondary(unsigned int cpu, struct task_struct *idle) { int ret; - if (!sram_base_addr || !pmu) { + if (!sram_base_addr || (has_pmu && !pmu)) { pr_err("%s: sram or pmu missing for cpu boot\n", __func__); return -ENXIO; } @@ -275,7 +279,7 @@ static void __init rockchip_smp_prepare_cpus(unsigned int max_cpus) return; } - if (rockchip_smp_prepare_pmu()) + if (has_pmu && rockchip_smp_prepare_pmu()) return; if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9) { @@ -318,6 +322,13 @@ static void __init rockchip_smp_prepare_cpus(unsigned int max_cpus) pmu_set_power_domain(0 + i, false); } +static void __init rk3036_smp_prepare_cpus(unsigned int max_cpus) +{ + has_pmu = false; + + rockchip_smp_prepare_cpus(max_cpus); +} + #ifdef CONFIG_HOTPLUG_CPU static int rockchip_cpu_kill(unsigned int cpu) { @@ -340,6 +351,15 @@ static void rockchip_cpu_die(unsigned int cpu) } #endif +static const struct smp_operations rk3036_smp_ops __initconst = { + .smp_prepare_cpus = rk3036_smp_prepare_cpus, + .smp_boot_secondary = rockchip_boot_secondary, +#ifdef CONFIG_HOTPLUG_CPU + .cpu_kill = rockchip_cpu_kill, + .cpu_die = rockchip_cpu_die, +#endif +}; + static struct smp_operations rockchip_smp_ops __initdata = { .smp_prepare_cpus = rockchip_smp_prepare_cpus, .smp_boot_secondary = rockchip_boot_secondary, @@ -349,4 +369,5 @@ static struct smp_operations rockchip_smp_ops __initdata = { #endif }; +CPU_METHOD_OF_DECLARE(rk3036_smp, "rockchip,rk3036-smp", &rk3036_smp_ops); CPU_METHOD_OF_DECLARE(rk3066_smp, "rockchip,rk3066-smp", &rockchip_smp_ops); diff --git a/arch/arm/mach-rockchip/rockchip.c b/arch/arm/mach-rockchip/rockchip.c index 251c7b9..3f07cc5 100644 --- a/arch/arm/mach-rockchip/rockchip.c +++ b/arch/arm/mach-rockchip/rockchip.c @@ -82,6 +82,7 @@ static const char * const rockchip_board_dt_compat[] = { "rockchip,rk3066a", "rockchip,rk3066b", "rockchip,rk3188", + "rockchip,rk3228", "rockchip,rk3288", NULL, }; |