diff options
| author | Josh Boyer <jwboyer@linux.vnet.ibm.com> | 2007-04-12 18:33:25 (GMT) |
|---|---|---|
| committer | Paul Mackerras <paulus@samba.org> | 2007-04-24 11:31:47 (GMT) |
| commit | a14c4508f4bb1bb7772b1976a82646be8d8b515a (patch) | |
| tree | 15d6750cb360fdb74f89c63c4fda641f6b148667 | |
| parent | c3ea6921a68ed4bdcfc782676c52707cbe347952 (diff) | |
| download | linux-a14c4508f4bb1bb7772b1976a82646be8d8b515a.tar.xz | |
[POWERPC] Fix PowerPC 750CL and 750GX CPU features
PowerPC 750CL has high BATs. The patch below adds a CPU_FTRS_750CL that
includes that. Without it, the original firmware mappings in the high BATs
aren't cleared which continue to override the linux translations.
It also adds CPU_FTR_COMMON to CPU_FTRS_750GX for completeness.
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
| -rw-r--r-- | arch/powerpc/kernel/cputable.c | 4 | ||||
| -rw-r--r-- | include/asm-powerpc/cputable.h | 10 |
2 files changed, 9 insertions, 5 deletions
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c index 6b59e40..ad74fec 100644 --- a/arch/powerpc/kernel/cputable.c +++ b/arch/powerpc/kernel/cputable.c @@ -562,12 +562,12 @@ static struct cpu_spec cpu_specs[] = { .pvr_mask = 0xfffff0f0, .pvr_value = 0x00087010, .cpu_name = "750CL", - .cpu_features = CPU_FTRS_750, + .cpu_features = CPU_FTRS_750CL, .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, .icache_bsize = 32, .dcache_bsize = 32, .num_pmcs = 4, - .cpu_setup = __setup_cpu_750cx, + .cpu_setup = __setup_cpu_750, .platform = "ppc750", }, { /* 745/755 */ diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h index e870b53..4f7c255 100644 --- a/include/asm-powerpc/cputable.h +++ b/include/asm-powerpc/cputable.h @@ -223,6 +223,10 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start, CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \ CPU_FTR_PPC_LE) +#define CPU_FTRS_750CL (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \ + CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ + CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \ + CPU_FTR_HAS_HIGH_BATS | CPU_FTR_PPC_LE) #define CPU_FTRS_750FX1 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \ CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \ @@ -235,9 +239,9 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start, CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \ CPU_FTR_DUAL_PLL_750FX | CPU_FTR_HAS_HIGH_BATS | CPU_FTR_PPC_LE) -#define CPU_FTRS_750GX (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | \ - CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU | \ - CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \ +#define CPU_FTRS_750GX (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \ + CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ + CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \ CPU_FTR_DUAL_PLL_750FX | CPU_FTR_HAS_HIGH_BATS | CPU_FTR_PPC_LE) #define CPU_FTRS_7400_NOTAU (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \ CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ |