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| author | Yuantian Tang <andy.tang@nxp.com> | 2017-06-20 08:02:16 (GMT) |
|---|---|---|
| committer | Xie Xiaobo <xiaobo.xie@nxp.com> | 2017-09-25 07:25:41 (GMT) |
| commit | fde2fa751a1ec74444a226995dc65e3f509241c8 (patch) | |
| tree | 5d688a584becf1c27a214aed634e07dcbe7f071e | |
| parent | a93e782dc9f8c6697cda67a2ee20b2dd8352d4c7 (diff) | |
| download | linux-fde2fa751a1ec74444a226995dc65e3f509241c8.tar.xz | |
arm64: dts: ls1088a: add cpu idle support
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi index aefdb53..4d5bb46 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi @@ -67,6 +67,7 @@ reg = <0x0>; clocks = <&clockgen 1 0>; #cooling-cells = <2>; + cpu-idle-states = <&CPU_PH20>; }; cpu1: cpu@1 { @@ -74,6 +75,7 @@ compatible = "arm,cortex-a53"; reg = <0x1>; clocks = <&clockgen 1 0>; + cpu-idle-states = <&CPU_PH20>; }; cpu2: cpu@2 { @@ -81,6 +83,7 @@ compatible = "arm,cortex-a53"; reg = <0x2>; clocks = <&clockgen 1 0>; + cpu-idle-states = <&CPU_PH20>; }; cpu3: cpu@3 { @@ -88,6 +91,7 @@ compatible = "arm,cortex-a53"; reg = <0x3>; clocks = <&clockgen 1 0>; + cpu-idle-states = <&CPU_PH20>; }; cpu4: cpu@100 { @@ -96,6 +100,7 @@ reg = <0x100>; clocks = <&clockgen 1 1>; #cooling-cells = <2>; + cpu-idle-states = <&CPU_PH20>; }; cpu5: cpu@101 { @@ -103,6 +108,7 @@ compatible = "arm,cortex-a53"; reg = <0x101>; clocks = <&clockgen 1 1>; + cpu-idle-states = <&CPU_PH20>; }; cpu6: cpu@102 { @@ -110,6 +116,7 @@ compatible = "arm,cortex-a53"; reg = <0x102>; clocks = <&clockgen 1 1>; + cpu-idle-states = <&CPU_PH20>; }; cpu7: cpu@103 { @@ -117,6 +124,24 @@ compatible = "arm,cortex-a53"; reg = <0x103>; clocks = <&clockgen 1 1>; + cpu-idle-states = <&CPU_PH20>; + }; + }; + + idle-states { + /* + * PSCI node is not added default, U-boot will add missing + * parts if it determines to use PSCI. + */ + entry-method = "arm,psci"; + + CPU_PH20: cpu-ph20 { + compatible = "arm,idle-state"; + idle-state-name = "PH20"; + arm,psci-suspend-param = <0x00010000>; + entry-latency-us = <1000>; + exit-latency-us = <1000>; + min-residency-us = <3000>; }; }; |