drm/nouveau/fifo: separate object classes for dma channels

Future code will use the object class rather than chipset checks in order to
identify available channel features.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

6 files changed, 10 insertions, 5 deletions

diff --git a/drivers/gpu/drm/nouveau/core/engine/dmaobj/nv04.c b/drivers/gpu/drm/nouveau/core/engine/dmaobj/nv04.c
index b0d3651..848aa3b 100644
--- a/drivers/gpu/drm/nouveau/core/engine/dmaobj/nv04.c
+++ b/drivers/gpu/drm/nouveau/core/engine/dmaobj/nv04.c
@@ -118,7 +118,10 @@ nv04_dmaobj_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
 		return ret;
 
 	switch (nv_mclass(parent)) {
+	case 0x006b:
 	case 0x006e:
+	case 0x176e:
+	case 0x406e:
 		ret = dmaeng->bind(dmaeng, *pobject, &dmaobj->base, &gpuobj);
 		nouveau_object_ref(NULL, pobject);
 		*pobject = nv_object(gpuobj);
diff --git a/drivers/gpu/drm/nouveau/core/engine/fifo/nv04.c b/drivers/gpu/drm/nouveau/core/engine/fifo/nv04.c
index 7cd5d76..ed77192 100644
--- a/drivers/gpu/drm/nouveau/core/engine/fifo/nv04.c
+++ b/drivers/gpu/drm/nouveau/core/engine/fifo/nv04.c
@@ -247,7 +247,7 @@ nv04_fifo_ofuncs = {
 
 static struct nouveau_oclass
 nv04_fifo_sclass[] = {
-	{ 0x006e, &nv04_fifo_ofuncs },
+	{ 0x006b, &nv04_fifo_ofuncs },
 	{}
 };
 
diff --git a/drivers/gpu/drm/nouveau/core/engine/fifo/nv17.c b/drivers/gpu/drm/nouveau/core/engine/fifo/nv17.c
index f223eb9..347b91e 100644
--- a/drivers/gpu/drm/nouveau/core/engine/fifo/nv17.c
+++ b/drivers/gpu/drm/nouveau/core/engine/fifo/nv17.c
@@ -113,7 +113,7 @@ nv17_fifo_ofuncs = {
 
 static struct nouveau_oclass
 nv17_fifo_sclass[] = {
-	{ 0x006e, &nv17_fifo_ofuncs },
+	{ 0x176e, &nv17_fifo_ofuncs },
 	{}
 };
 
diff --git a/drivers/gpu/drm/nouveau/core/engine/fifo/nv40.c b/drivers/gpu/drm/nouveau/core/engine/fifo/nv40.c
index ce97c5e..48114e6 100644
--- a/drivers/gpu/drm/nouveau/core/engine/fifo/nv40.c
+++ b/drivers/gpu/drm/nouveau/core/engine/fifo/nv40.c
@@ -232,7 +232,7 @@ nv40_fifo_ofuncs = {
 
 static struct nouveau_oclass
 nv40_fifo_sclass[] = {
-	{ 0x006e, &nv40_fifo_ofuncs },
+	{ 0x406e, &nv40_fifo_ofuncs },
 	{}
 };
 
diff --git a/drivers/gpu/drm/nouveau/core/include/core/class.h b/drivers/gpu/drm/nouveau/core/include/core/class.h
index 9c6b0eb..55b53ed 100644
--- a/drivers/gpu/drm/nouveau/core/include/core/class.h
+++ b/drivers/gpu/drm/nouveau/core/include/core/class.h
@@ -53,6 +53,7 @@ struct nv_dma_class {
 
 /* 006b: NV03_CHANNEL_DMA
  * 006e: NV10_CHANNEL_DMA
+ * 176e: NV17_CHANNEL_DMA
  * 406e: NV40_CHANNEL_DMA
  */
 
diff --git a/drivers/gpu/drm/nouveau/nouveau_chan.c b/drivers/gpu/drm/nouveau/nouveau_chan.c
index 62c7edf..cf61dc0 100644
--- a/drivers/gpu/drm/nouveau/nouveau_chan.c
+++ b/drivers/gpu/drm/nouveau/nouveau_chan.c
@@ -221,7 +221,7 @@ static int
 nouveau_channel_dma(struct nouveau_drm *drm, struct nouveau_cli *cli,
 		    u32 parent, u32 handle, struct nouveau_channel **pchan)
 {
-	static const u16 oclasses[] = { 0x006e, 0 };
+	static const u16 oclasses[] = { 0x406e, 0x176e, 0x006e, 0x006b, 0 };
 	const u16 *oclass = oclasses;
 	struct nv_channel_dma_class args;
 	struct nouveau_channel *chan;
@@ -305,7 +305,8 @@ nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart)
 	}
 
 	/* initialise dma tracking parameters */
-	switch (nv_hclass(chan->object) & 0xffff) {
+	switch (nv_hclass(chan->object) & 0x00ff) {
+	case 0x006b:
 	case 0x006e:
 		chan->user_put = 0x40;
 		chan->user_get = 0x44;