diff options
author | Stephen Warren <swarren@nvidia.com> | 2012-03-26 22:49:39 (GMT) |
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committer | Stephen Warren <swarren@nvidia.com> | 2012-04-25 21:22:01 (GMT) |
commit | 18b81fb733356025a6ad48b85092a0456e348ff0 (patch) | |
tree | 98299e45e3fed504421c79f48e04661916a0f9db | |
parent | 6437626928467e81aa4a3087d88cd3f443b3e9ec (diff) | |
download | linux-18b81fb733356025a6ad48b85092a0456e348ff0.tar.xz |
ARM: tegra: set up audio clocks for tegra30 dt
Set up the audio clock tree for Tegra30 in an equivalent fashion to the
existing setup for Tegra20.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
-rw-r--r-- | arch/arm/mach-tegra/board-dt-tegra30.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/board-dt-tegra30.c b/arch/arm/mach-tegra/board-dt-tegra30.c index 5f7c03e..3de21c0 100644 --- a/arch/arm/mach-tegra/board-dt-tegra30.c +++ b/arch/arm/mach-tegra/board-dt-tegra30.c @@ -57,6 +57,15 @@ struct of_dev_auxdata tegra30_auxdata_lookup[] __initdata = { static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = { /* name parent rate enabled */ { "uarta", "pll_p", 408000000, true }, + { "pll_a", "pll_p_out1", 564480000, true }, + { "pll_a_out0", "pll_a", 11289600, true }, + { "extern1", "pll_a_out0", 0, true }, + { "clk_out_1", "extern1", 0, true }, + { "i2s0", "pll_a_out0", 11289600, false}, + { "i2s1", "pll_a_out0", 11289600, false}, + { "i2s2", "pll_a_out0", 11289600, false}, + { "i2s3", "pll_a_out0", 11289600, false}, + { "i2s4", "pll_a_out0", 11289600, false}, { NULL, NULL, 0, 0}, }; |