diff options
author | Vinod Koul <vinod.koul@intel.com> | 2016-10-03 03:46:03 (GMT) |
---|---|---|
committer | Vinod Koul <vinod.koul@intel.com> | 2016-10-03 03:46:03 (GMT) |
commit | 6619f035a64dd44c7238b7341c138a3975d59111 (patch) | |
tree | fce47632273afaa50960abb2c60a04bf63e44783 | |
parent | 02aa84860c29f3f5a57e959982c811df46a2736c (diff) | |
parent | 509cf0b8146c73e6f29bcf732d1af1b1aed5ec01 (diff) | |
download | linux-6619f035a64dd44c7238b7341c138a3975d59111.tar.xz |
Merge branch 'topic/compile_test' into for-linus
-rw-r--r-- | drivers/dma/Kconfig | 38 | ||||
-rw-r--r-- | drivers/dma/coh901318.c | 20 | ||||
-rw-r--r-- | drivers/dma/coh901318_lli.c | 4 | ||||
-rw-r--r-- | drivers/dma/dma-jz4740.c | 2 | ||||
-rw-r--r-- | drivers/dma/dma-jz4780.c | 2 | ||||
-rw-r--r-- | drivers/dma/edma.c | 26 | ||||
-rw-r--r-- | drivers/dma/ep93xx_dma.c | 12 | ||||
-rw-r--r-- | drivers/dma/mmp_tdma.c | 2 | ||||
-rw-r--r-- | drivers/dma/s3c24xx-dma.c | 6 | ||||
-rw-r--r-- | drivers/dma/sa11x0-dma.c | 14 | ||||
-rw-r--r-- | drivers/dma/stm32-dma.c | 2 | ||||
-rw-r--r-- | drivers/dma/ti-dma-crossbar.c | 30 | ||||
-rw-r--r-- | include/linux/omap-dma.h | 19 | ||||
-rw-r--r-- | include/linux/platform_data/dma-mmp_tdma.h | 2 |
14 files changed, 100 insertions, 79 deletions
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig index 739f797..9e680ec 100644 --- a/drivers/dma/Kconfig +++ b/drivers/dma/Kconfig @@ -102,7 +102,7 @@ config AXI_DMAC config COH901318 bool "ST-Ericsson COH901318 DMA support" select DMA_ENGINE - depends on ARCH_U300 + depends on ARCH_U300 || COMPILE_TEST help Enable support for ST-Ericsson COH 901 318 DMA. @@ -114,13 +114,13 @@ config DMA_BCM2835 config DMA_JZ4740 tristate "JZ4740 DMA support" - depends on MACH_JZ4740 + depends on MACH_JZ4740 || COMPILE_TEST select DMA_ENGINE select DMA_VIRTUAL_CHANNELS config DMA_JZ4780 tristate "JZ4780 DMA support" - depends on MACH_JZ4780 + depends on MACH_JZ4780 || COMPILE_TEST select DMA_ENGINE select DMA_VIRTUAL_CHANNELS help @@ -130,14 +130,14 @@ config DMA_JZ4780 config DMA_OMAP tristate "OMAP DMA support" - depends on ARCH_OMAP + depends on ARCH_OMAP || COMPILE_TEST select DMA_ENGINE select DMA_VIRTUAL_CHANNELS - select TI_DMA_CROSSBAR if SOC_DRA7XX + select TI_DMA_CROSSBAR if (SOC_DRA7XX || COMPILE_TEST) config DMA_SA11X0 tristate "SA-11x0 DMA support" - depends on ARCH_SA1100 + depends on ARCH_SA1100 || COMPILE_TEST select DMA_ENGINE select DMA_VIRTUAL_CHANNELS help @@ -150,7 +150,6 @@ config DMA_SUN4I depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I default (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I) select DMA_ENGINE - select DMA_OF select DMA_VIRTUAL_CHANNELS help Enable support for the DMA controller present in the sun4i, @@ -167,7 +166,7 @@ config DMA_SUN6I config EP93XX_DMA bool "Cirrus Logic EP93xx DMA support" - depends on ARCH_EP93XX + depends on ARCH_EP93XX || COMPILE_TEST select DMA_ENGINE help Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller. @@ -297,16 +296,16 @@ config LPC18XX_DMAMUX config MMP_PDMA bool "MMP PDMA support" - depends on (ARCH_MMP || ARCH_PXA) + depends on ARCH_MMP || ARCH_PXA || COMPILE_TEST select DMA_ENGINE help Support the MMP PDMA engine for PXA and MMP platform. config MMP_TDMA bool "MMP Two-Channel DMA support" - depends on ARCH_MMP + depends on ARCH_MMP || COMPILE_TEST select DMA_ENGINE - select MMP_SRAM + select MMP_SRAM if ARCH_MMP help Support the MMP Two-Channel DMA engine. This engine used for MMP Audio DMA and pxa910 SQU. @@ -316,7 +315,6 @@ config MOXART_DMA tristate "MOXART DMA support" depends on ARCH_MOXART select DMA_ENGINE - select DMA_OF select DMA_VIRTUAL_CHANNELS help Enable support for the MOXA ART SoC DMA controller. @@ -439,9 +437,8 @@ config STE_DMA40 config STM32_DMA bool "STMicroelectronics STM32 DMA support" - depends on ARCH_STM32 + depends on ARCH_STM32 || COMPILE_TEST select DMA_ENGINE - select DMA_OF select DMA_VIRTUAL_CHANNELS help Enable support for the on-chip DMA controller on STMicroelectronics @@ -451,7 +448,7 @@ config STM32_DMA config S3C24XX_DMAC bool "Samsung S3C24XX DMA support" - depends on ARCH_S3C24XX + depends on ARCH_S3C24XX || COMPILE_TEST select DMA_ENGINE select DMA_VIRTUAL_CHANNELS help @@ -483,10 +480,9 @@ config TEGRA20_APB_DMA config TEGRA210_ADMA bool "NVIDIA Tegra210 ADMA support" - depends on ARCH_TEGRA_210_SOC + depends on (ARCH_TEGRA_210_SOC || COMPILE_TEST) && PM_CLK select DMA_ENGINE select DMA_VIRTUAL_CHANNELS - select PM_CLK help Support for the NVIDIA Tegra210 ADMA controller driver. The DMA controller has multiple DMA channels and is used to service @@ -497,7 +493,7 @@ config TEGRA210_ADMA config TIMB_DMA tristate "Timberdale FPGA DMA support" - depends on MFD_TIMBERDALE + depends on MFD_TIMBERDALE || COMPILE_TEST select DMA_ENGINE help Enable support for the Timberdale FPGA DMA engine. @@ -515,10 +511,10 @@ config TI_DMA_CROSSBAR config TI_EDMA bool "TI EDMA support" - depends on ARCH_DAVINCI || ARCH_OMAP || ARCH_KEYSTONE + depends on ARCH_DAVINCI || ARCH_OMAP || ARCH_KEYSTONE || COMPILE_TEST select DMA_ENGINE select DMA_VIRTUAL_CHANNELS - select TI_DMA_CROSSBAR if ARCH_OMAP + select TI_DMA_CROSSBAR if (ARCH_OMAP || COMPILE_TEST) default n help Enable support for the TI EDMA controller. This DMA @@ -561,7 +557,7 @@ config XILINX_ZYNQMP_DMA config ZX_DMA tristate "ZTE ZX296702 DMA support" - depends on ARCH_ZX + depends on ARCH_ZX || COMPILE_TEST select DMA_ENGINE select DMA_VIRTUAL_CHANNELS help diff --git a/drivers/dma/coh901318.c b/drivers/dma/coh901318.c index 5b1d4a3..472be1d 100644 --- a/drivers/dma/coh901318.c +++ b/drivers/dma/coh901318.c @@ -1319,10 +1319,10 @@ static void coh901318_list_print(struct coh901318_chan *cohc, int i = 0; while (l) { - dev_vdbg(COHC_2_DEV(cohc), "i %d, lli %p, ctrl 0x%x, src 0x%x" - ", dst 0x%x, link 0x%x virt_link_addr 0x%p\n", - i, l, l->control, l->src_addr, l->dst_addr, - l->link_addr, l->virt_link_addr); + dev_vdbg(COHC_2_DEV(cohc), "i %d, lli %p, ctrl 0x%x, src 0x%pad" + ", dst 0x%pad, link 0x%pad virt_link_addr 0x%p\n", + i, l, l->control, &l->src_addr, &l->dst_addr, + &l->link_addr, l->virt_link_addr); i++; l = l->virt_link_addr; } @@ -1335,7 +1335,7 @@ static void coh901318_list_print(struct coh901318_chan *cohc, static struct coh901318_base *debugfs_dma_base; static struct dentry *dma_dentry; -static int coh901318_debugfs_read(struct file *file, char __user *buf, +static ssize_t coh901318_debugfs_read(struct file *file, char __user *buf, size_t count, loff_t *f_pos) { u64 started_channels = debugfs_dma_base->pm.started_channels; @@ -1753,7 +1753,7 @@ static int coh901318_resume(struct dma_chan *chan) bool coh901318_filter_id(struct dma_chan *chan, void *chan_id) { - unsigned int ch_nr = (unsigned int) chan_id; + unsigned long ch_nr = (unsigned long) chan_id; if (ch_nr == to_coh901318_chan(chan)->id) return true; @@ -2234,8 +2234,8 @@ coh901318_prep_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src, spin_lock_irqsave(&cohc->lock, flg); dev_vdbg(COHC_2_DEV(cohc), - "[%s] channel %d src 0x%x dest 0x%x size %d\n", - __func__, cohc->id, src, dest, size); + "[%s] channel %d src 0x%pad dest 0x%pad size %zu\n", + __func__, cohc->id, &src, &dest, size); if (flags & DMA_PREP_INTERRUPT) /* Trigger interrupt after last lli */ @@ -2731,8 +2731,8 @@ static int __init coh901318_probe(struct platform_device *pdev) goto err_register_of_dma; platform_set_drvdata(pdev, base); - dev_info(&pdev->dev, "Initialized COH901318 DMA on virtual base 0x%08x\n", - (u32) base->virtbase); + dev_info(&pdev->dev, "Initialized COH901318 DMA on virtual base 0x%p\n", + base->virtbase); return err; diff --git a/drivers/dma/coh901318_lli.c b/drivers/dma/coh901318_lli.c index 702112d..d612b2e 100644 --- a/drivers/dma/coh901318_lli.c +++ b/drivers/dma/coh901318_lli.c @@ -75,7 +75,7 @@ coh901318_lli_alloc(struct coh901318_pool *pool, unsigned int len) lli = head; lli->phy_this = phy; lli->link_addr = 0x00000000; - lli->virt_link_addr = 0x00000000U; + lli->virt_link_addr = NULL; for (i = 1; i < len; i++) { lli_prev = lli; @@ -88,7 +88,7 @@ coh901318_lli_alloc(struct coh901318_pool *pool, unsigned int len) DEBUGFS_POOL_COUNTER_ADD(pool, 1); lli->phy_this = phy; lli->link_addr = 0x00000000; - lli->virt_link_addr = 0x00000000U; + lli->virt_link_addr = NULL; lli_prev->link_addr = phy; lli_prev->virt_link_addr = lli; diff --git a/drivers/dma/dma-jz4740.c b/drivers/dma/dma-jz4740.c index 9689b36..d50273f 100644 --- a/drivers/dma/dma-jz4740.c +++ b/drivers/dma/dma-jz4740.c @@ -21,8 +21,6 @@ #include <linux/irq.h> #include <linux/clk.h> -#include <asm/mach-jz4740/dma.h> - #include "virt-dma.h" #define JZ_DMA_NR_CHANS 6 diff --git a/drivers/dma/dma-jz4780.c b/drivers/dma/dma-jz4780.c index 27e9336..7373b7a 100644 --- a/drivers/dma/dma-jz4780.c +++ b/drivers/dma/dma-jz4780.c @@ -400,7 +400,7 @@ static struct dma_async_tx_descriptor *jz4780_dma_prep_dma_cyclic( return vchan_tx_prep(&jzchan->vchan, &desc->vdesc, flags); } -struct dma_async_tx_descriptor *jz4780_dma_prep_dma_memcpy( +static struct dma_async_tx_descriptor *jz4780_dma_prep_dma_memcpy( struct dma_chan *chan, dma_addr_t dest, dma_addr_t src, size_t len, unsigned long flags) { diff --git a/drivers/dma/edma.c b/drivers/dma/edma.c index 9d5dff4..e18a580 100644 --- a/drivers/dma/edma.c +++ b/drivers/dma/edma.c @@ -263,22 +263,29 @@ static const struct edmacc_param dummy_paramset = { #define EDMA_BINDING_LEGACY 0 #define EDMA_BINDING_TPCC 1 +static const u32 edma_binding_type[] = { + [EDMA_BINDING_LEGACY] = EDMA_BINDING_LEGACY, + [EDMA_BINDING_TPCC] = EDMA_BINDING_TPCC, +}; + static const struct of_device_id edma_of_ids[] = { { .compatible = "ti,edma3", - .data = (void *)EDMA_BINDING_LEGACY, + .data = &edma_binding_type[EDMA_BINDING_LEGACY], }, { .compatible = "ti,edma3-tpcc", - .data = (void *)EDMA_BINDING_TPCC, + .data = &edma_binding_type[EDMA_BINDING_TPCC], }, {} }; +MODULE_DEVICE_TABLE(of, edma_of_ids); static const struct of_device_id edma_tptc_of_ids[] = { { .compatible = "ti,edma3-tptc", }, {} }; +MODULE_DEVICE_TABLE(of, edma_tptc_of_ids); static inline unsigned int edma_read(struct edma_cc *ecc, int offset) { @@ -405,18 +412,12 @@ static inline void edma_param_or(struct edma_cc *ecc, int offset, int param_no, edma_or(ecc, EDMA_PARM + offset + (param_no << 5), or); } -static inline void set_bits(int offset, int len, unsigned long *p) +static inline void edma_set_bits(int offset, int len, unsigned long *p) { for (; len > 0; len--) set_bit(offset + (len - 1), p); } -static inline void clear_bits(int offset, int len, unsigned long *p) -{ - for (; len > 0; len--) - clear_bit(offset + (len - 1), p); -} - static void edma_assign_priority_to_queue(struct edma_cc *ecc, int queue_no, int priority) { @@ -2023,8 +2024,7 @@ static struct edma_soc_info *edma_setup_info_from_dt(struct device *dev, { struct edma_soc_info *info; struct property *prop; - size_t sz; - int ret; + int sz, ret; info = devm_kzalloc(dev, sizeof(struct edma_soc_info), GFP_KERNEL); if (!info) @@ -2186,7 +2186,7 @@ static int edma_probe(struct platform_device *pdev) const struct of_device_id *match; match = of_match_node(edma_of_ids, node); - if (match && (u32)match->data == EDMA_BINDING_TPCC) + if (match && (*(u32 *)match->data) == EDMA_BINDING_TPCC) legacy_mode = false; info = edma_setup_info_from_dt(dev, legacy_mode); @@ -2264,7 +2264,7 @@ static int edma_probe(struct platform_device *pdev) for (i = 0; rsv_slots[i][0] != -1; i++) { off = rsv_slots[i][0]; ln = rsv_slots[i][1]; - set_bits(off, ln, ecc->slot_inuse); + edma_set_bits(off, ln, ecc->slot_inuse); } } } diff --git a/drivers/dma/ep93xx_dma.c b/drivers/dma/ep93xx_dma.c index 2ffaca2..ca17e87 100644 --- a/drivers/dma/ep93xx_dma.c +++ b/drivers/dma/ep93xx_dma.c @@ -1045,11 +1045,11 @@ ep93xx_dma_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, first = NULL; for_each_sg(sgl, sg, sg_len, i) { - size_t sg_len = sg_dma_len(sg); + size_t len = sg_dma_len(sg); - if (sg_len > DMA_MAX_CHAN_BYTES) { - dev_warn(chan2dev(edmac), "too big transfer size %d\n", - sg_len); + if (len > DMA_MAX_CHAN_BYTES) { + dev_warn(chan2dev(edmac), "too big transfer size %zu\n", + len); goto fail; } @@ -1066,7 +1066,7 @@ ep93xx_dma_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, desc->src_addr = edmac->runtime_addr; desc->dst_addr = sg_dma_address(sg); } - desc->size = sg_len; + desc->size = len; if (!first) first = desc; @@ -1123,7 +1123,7 @@ ep93xx_dma_prep_dma_cyclic(struct dma_chan *chan, dma_addr_t dma_addr, } if (period_len > DMA_MAX_CHAN_BYTES) { - dev_warn(chan2dev(edmac), "too big period length %d\n", + dev_warn(chan2dev(edmac), "too big period length %zu\n", period_len); return NULL; } diff --git a/drivers/dma/mmp_tdma.c b/drivers/dma/mmp_tdma.c index b3441f5..d7422b1 100644 --- a/drivers/dma/mmp_tdma.c +++ b/drivers/dma/mmp_tdma.c @@ -433,7 +433,7 @@ static struct dma_async_tx_descriptor *mmp_tdma_prep_dma_cyclic( if (period_len > TDMA_MAX_XFER_BYTES) { dev_err(tdmac->dev, - "maximum period size exceeded: %d > %d\n", + "maximum period size exceeded: %zu > %d\n", period_len, TDMA_MAX_XFER_BYTES); goto err_out; } diff --git a/drivers/dma/s3c24xx-dma.c b/drivers/dma/s3c24xx-dma.c index d5c85e7..3c579ab 100644 --- a/drivers/dma/s3c24xx-dma.c +++ b/drivers/dma/s3c24xx-dma.c @@ -823,11 +823,11 @@ static struct dma_async_tx_descriptor *s3c24xx_dma_prep_memcpy( struct s3c24xx_sg *dsg; int src_mod, dest_mod; - dev_dbg(&s3cdma->pdev->dev, "prepare memcpy of %d bytes from %s\n", + dev_dbg(&s3cdma->pdev->dev, "prepare memcpy of %zu bytes from %s\n", len, s3cchan->name); if ((len & S3C24XX_DCON_TC_MASK) != len) { - dev_err(&s3cdma->pdev->dev, "memcpy size %d to large\n", len); + dev_err(&s3cdma->pdev->dev, "memcpy size %zu to large\n", len); return NULL; } @@ -1421,7 +1421,7 @@ bool s3c24xx_dma_filter(struct dma_chan *chan, void *param) s3cchan = to_s3c24xx_dma_chan(chan); - return s3cchan->id == (int)param; + return s3cchan->id == (uintptr_t)param; } EXPORT_SYMBOL(s3c24xx_dma_filter); diff --git a/drivers/dma/sa11x0-dma.c b/drivers/dma/sa11x0-dma.c index 43db255..1adeb32 100644 --- a/drivers/dma/sa11x0-dma.c +++ b/drivers/dma/sa11x0-dma.c @@ -463,7 +463,7 @@ static enum dma_status sa11x0_dma_tx_status(struct dma_chan *chan, dma_addr_t addr = sa11x0_dma_pos(p); unsigned i; - dev_vdbg(d->slave.dev, "tx_status: addr:%x\n", addr); + dev_vdbg(d->slave.dev, "tx_status: addr:%pad\n", &addr); for (i = 0; i < txd->sglen; i++) { dev_vdbg(d->slave.dev, "tx_status: [%u] %x+%x\n", @@ -491,7 +491,7 @@ static enum dma_status sa11x0_dma_tx_status(struct dma_chan *chan, } spin_unlock_irqrestore(&c->vc.lock, flags); - dev_vdbg(d->slave.dev, "tx_status: bytes 0x%zx\n", state->residue); + dev_vdbg(d->slave.dev, "tx_status: bytes 0x%x\n", state->residue); return ret; } @@ -551,8 +551,8 @@ static struct dma_async_tx_descriptor *sa11x0_dma_prep_slave_sg( if (len > DMA_MAX_SIZE) j += DIV_ROUND_UP(len, DMA_MAX_SIZE & ~DMA_ALIGN) - 1; if (addr & DMA_ALIGN) { - dev_dbg(chan->device->dev, "vchan %p: bad buffer alignment: %08x\n", - &c->vc, addr); + dev_dbg(chan->device->dev, "vchan %p: bad buffer alignment: %pad\n", + &c->vc, &addr); return NULL; } } @@ -599,7 +599,7 @@ static struct dma_async_tx_descriptor *sa11x0_dma_prep_slave_sg( txd->size = size; txd->sglen = j; - dev_dbg(chan->device->dev, "vchan %p: txd %p: size %u nr %u\n", + dev_dbg(chan->device->dev, "vchan %p: txd %p: size %zu nr %u\n", &c->vc, &txd->vd, txd->size, txd->sglen); return vchan_tx_prep(&c->vc, &txd->vd, flags); @@ -693,8 +693,8 @@ static int sa11x0_dma_device_config(struct dma_chan *chan, if (maxburst == 8) ddar |= DDAR_BS; - dev_dbg(c->vc.chan.device->dev, "vchan %p: dma_slave_config addr %x width %u burst %u\n", - &c->vc, addr, width, maxburst); + dev_dbg(c->vc.chan.device->dev, "vchan %p: dma_slave_config addr %pad width %u burst %u\n", + &c->vc, &addr, width, maxburst); c->ddar = ddar | (addr & 0xf0000000) | (addr & 0x003ffffc) << 6; diff --git a/drivers/dma/stm32-dma.c b/drivers/dma/stm32-dma.c index 047476a..307547f 100644 --- a/drivers/dma/stm32-dma.c +++ b/drivers/dma/stm32-dma.c @@ -954,7 +954,7 @@ static void stm32_dma_desc_free(struct virt_dma_desc *vdesc) kfree(container_of(vdesc, struct stm32_dma_desc, vdesc)); } -void stm32_dma_set_config(struct stm32_dma_chan *chan, +static void stm32_dma_set_config(struct stm32_dma_chan *chan, struct stm32_dma_cfg *cfg) { stm32_dma_clear_reg(&chan->chan_reg); diff --git a/drivers/dma/ti-dma-crossbar.c b/drivers/dma/ti-dma-crossbar.c index 5ae294b..3f24aeb 100644 --- a/drivers/dma/ti-dma-crossbar.c +++ b/drivers/dma/ti-dma-crossbar.c @@ -18,15 +18,19 @@ #define TI_XBAR_DRA7 0 #define TI_XBAR_AM335X 1 +static const u32 ti_xbar_type[] = { + [TI_XBAR_DRA7] = TI_XBAR_DRA7, + [TI_XBAR_AM335X] = TI_XBAR_AM335X, +}; static const struct of_device_id ti_dma_xbar_match[] = { { .compatible = "ti,dra7-dma-crossbar", - .data = (void *)TI_XBAR_DRA7, + .data = &ti_xbar_type[TI_XBAR_DRA7], }, { .compatible = "ti,am335x-edma-crossbar", - .data = (void *)TI_XBAR_AM335X, + .data = &ti_xbar_type[TI_XBAR_AM335X], }, {}, }; @@ -190,9 +194,6 @@ static int ti_am335x_xbar_probe(struct platform_device *pdev) #define TI_DRA7_XBAR_OUTPUTS 127 #define TI_DRA7_XBAR_INPUTS 256 -#define TI_XBAR_EDMA_OFFSET 0 -#define TI_XBAR_SDMA_OFFSET 1 - struct ti_dra7_xbar_data { void __iomem *iomem; @@ -280,18 +281,25 @@ static void *ti_dra7_xbar_route_allocate(struct of_phandle_args *dma_spec, return map; } +#define TI_XBAR_EDMA_OFFSET 0 +#define TI_XBAR_SDMA_OFFSET 1 +static const u32 ti_dma_offset[] = { + [TI_XBAR_EDMA_OFFSET] = 0, + [TI_XBAR_SDMA_OFFSET] = 1, +}; + static const struct of_device_id ti_dra7_master_match[] = { { .compatible = "ti,omap4430-sdma", - .data = (void *)TI_XBAR_SDMA_OFFSET, + .data = &ti_dma_offset[TI_XBAR_SDMA_OFFSET], }, { .compatible = "ti,edma3", - .data = (void *)TI_XBAR_EDMA_OFFSET, + .data = &ti_dma_offset[TI_XBAR_EDMA_OFFSET], }, { .compatible = "ti,edma3-tpcc", - .data = (void *)TI_XBAR_EDMA_OFFSET, + .data = &ti_dma_offset[TI_XBAR_EDMA_OFFSET], }, {}, }; @@ -311,7 +319,7 @@ static int ti_dra7_xbar_probe(struct platform_device *pdev) struct property *prop; struct resource *res; u32 safe_val; - size_t sz; + int sz; void __iomem *iomem; int i, ret; @@ -395,7 +403,7 @@ static int ti_dra7_xbar_probe(struct platform_device *pdev) xbar->dmarouter.dev = &pdev->dev; xbar->dmarouter.route_free = ti_dra7_xbar_free; - xbar->dma_offset = (u32)match->data; + xbar->dma_offset = *(u32 *)match->data; mutex_init(&xbar->mutex); platform_set_drvdata(pdev, xbar); @@ -428,7 +436,7 @@ static int ti_dma_xbar_probe(struct platform_device *pdev) if (unlikely(!match)) return -EINVAL; - switch ((u32)match->data) { + switch (*(u32 *)match->data) { case TI_XBAR_DRA7: ret = ti_dra7_xbar_probe(pdev); break; diff --git a/include/linux/omap-dma.h b/include/linux/omap-dma.h index 1d99b61..2900816 100644 --- a/include/linux/omap-dma.h +++ b/include/linux/omap-dma.h @@ -297,6 +297,7 @@ struct omap_system_dma_plat_info { #define dma_omap15xx() __dma_omap15xx(d) #define dma_omap16xx() __dma_omap16xx(d) +#if defined(CONFIG_ARCH_OMAP) extern struct omap_system_dma_plat_info *omap_get_plat_info(void); extern void omap_set_dma_priority(int lch, int dst_port, int priority); @@ -355,4 +356,22 @@ static inline int omap_lcd_dma_running(void) } #endif +#else /* CONFIG_ARCH_OMAP */ + +static inline struct omap_system_dma_plat_info *omap_get_plat_info(void) +{ + return NULL; +} + +static inline int omap_request_dma(int dev_id, const char *dev_name, + void (*callback)(int lch, u16 ch_status, void *data), + void *data, int *dma_ch) +{ + return -ENODEV; +} + +static inline void omap_free_dma(int ch) { } + +#endif /* CONFIG_ARCH_OMAP */ + #endif /* __LINUX_OMAP_DMA_H */ diff --git a/include/linux/platform_data/dma-mmp_tdma.h b/include/linux/platform_data/dma-mmp_tdma.h index 0c72886..422d450 100644 --- a/include/linux/platform_data/dma-mmp_tdma.h +++ b/include/linux/platform_data/dma-mmp_tdma.h @@ -28,7 +28,7 @@ struct sram_platdata { int granularity; }; -#ifdef CONFIG_ARM +#ifdef CONFIG_MMP_SRAM extern struct gen_pool *sram_get_gpool(char *pool_name); #else static inline struct gen_pool *sram_get_gpool(char *pool_name) |