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| author | Eugeni Dodonov <eugeni.dodonov@intel.com> | 2012-03-29 15:32:29 (GMT) |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-04-09 16:04:01 (GMT) |
| commit | 7501a4d846c9ca3d448f0eee102ebc409d9c1b19 (patch) | |
| tree | 34a6a1a5c470a33a9723ef2dd432f6bb3e640bf1 | |
| parent | bb879a44ffd5f708be14b1578239e51b2a4555e8 (diff) | |
| download | linux-7501a4d846c9ca3d448f0eee102ebc409d9c1b19.tar.xz | |
drm/i915: add SBI registers
Those are responsible for the Sideband Interface programming.
v2: rename SBI bits to better reflect their meaning
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index a87f41c..542128c 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -4116,4 +4116,16 @@ DDI_BUF_TRANS_A, \ DDI_BUF_TRANS_B) +/* Sideband Interface (SBI) is programmed indirectly, via + * SBI_ADDR, which contains the register offset; and SBI_DATA, + * which contains the payload */ +#define SBI_ADDR 0xC6000 +#define SBI_DATA 0xC6004 +#define SBI_CTL_STAT 0xC6008 +#define SBI_CTL_OP_CRRD (0x6<<8) +#define SBI_CTL_OP_CRWR (0x7<<8) +#define SBI_RESPONSE_FAIL (0x1<<1) +#define SBI_RESPONSE_SUCCESS (0x0<<1) +#define SBI_BUSY (0x1<<0) +#define SBI_READY (0x0<<0) #endif /* _I915_REG_H_ */ |