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| author | Marc Zyngier <marc.zyngier@arm.com> | 2014-02-18 14:04:44 (GMT) |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2014-02-18 15:52:02 (GMT) |
| commit | 7902763e4a4d04a96406447f935a8f676e73e0ce (patch) | |
| tree | e9128c21bb780f20468541c32b710f8f56725f03 | |
| parent | 434e41b34a894de3b4c7af9d0ab9a2040eeeee6b (diff) | |
| download | linux-7902763e4a4d04a96406447f935a8f676e73e0ce.tar.xz | |
ARM: sun7i: add arch timer node
The Allwinner A20 SoC is built around a pair of Cortex-A7 cores,
which have the usual generic timers. Report this in the DT.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| -rw-r--r-- | arch/arm/boot/dts/sun7i-a20.dtsi | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index 2cdf57d..25ba9fa 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -49,6 +49,14 @@ reg = <0x40000000 0x80000000>; }; + timer { + compatible = "arm,armv7-timer"; + interrupts = <1 13 0xf08>, + <1 14 0xf08>, + <1 11 0xf08>, + <1 10 0xf08>; + }; + clocks { #address-cells = <1>; #size-cells = <1>; |