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| author | Zhang Ying-22455 <ying.zhang22455@nxp.com> | 2017-11-01 02:31:47 (GMT) |
|---|---|---|
| committer | Xie Xiaobo <xiaobo.xie@nxp.com> | 2017-12-12 09:38:27 (GMT) |
| commit | 980b261e8c2e8b22afe08c7bab438433c44ab485 (patch) | |
| tree | 2e17829b45952dff4640059ff983d0eed9055f7c | |
| parent | b0c4ae093b3df772d27ef109ca810fefab005fca (diff) | |
| download | linux-980b261e8c2e8b22afe08c7bab438433c44ab485.tar.xz | |
arm64: dts: ls1012a: correct the i2c clock to 1/4 platform pll
Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi index ea56b80..071fa88 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi @@ -380,7 +380,7 @@ #size-cells = <0>; reg = <0x0 0x2180000 0x0 0x10000>; interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clockgen 4 0>; + clocks = <&clockgen 4 3>; status = "disabled"; }; @@ -390,7 +390,7 @@ #size-cells = <0>; reg = <0x0 0x2190000 0x0 0x10000>; interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clockgen 4 0>; + clocks = <&clockgen 4 3>; status = "disabled"; }; |