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| author | Alexandre Courbot <acourbot@nvidia.com> | 2016-02-25 06:08:42 (GMT) |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2016-03-14 00:13:29 (GMT) |
| commit | 9d0394c6bed5b4b78167cc0eea294754a9cb2bbc (patch) | |
| tree | 1bb24056ddf62eaf427b981423447ce180011d94 | |
| parent | 7d31cb7ca47e7268478033d62ce3ad37bf509655 (diff) | |
| download | linux-9d0394c6bed5b4b78167cc0eea294754a9cb2bbc.tar.xz | |
drm/nouveau/instmem/gk20a: set DMA mask early
DMA mask is typically set in nouveau_ttm_init(), but this function is
called late during initialization and GK20A's instmem will have called
DMA functions before this happens.
Having a wrongly set DMA mask can result in the use of unneeded bounce
buffers. Set it early to avoid this.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| -rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c index 92cc7c6..9afa5f3 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c @@ -280,6 +280,15 @@ nvkm_device_tegra_new(const struct nvkm_device_tegra_func *func, goto free; } + /** + * The IOMMU bit defines the upper limit of the GPU-addressable space. + * This will be refined in nouveau_ttm_init but we need to do it early + * for instmem to behave properly + */ + ret = dma_set_mask(&pdev->dev, DMA_BIT_MASK(tdev->func->iommu_bit)); + if (ret) + goto free; + nvkm_device_tegra_probe_iommu(tdev); ret = nvkm_device_tegra_power_up(tdev); |