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authorJavier Martin <javier.martin@vista-silicon.com>2012-10-31 10:53:33 (GMT)
committerMark Brown <broonie@opensource.wolfsonmicro.com>2012-11-01 14:35:56 (GMT)
commita405387c6825b1fc1956e22b10160b0f31536f3f (patch)
tree05d36e0c8f87c1e487b353282ed9aad7c3581c02
parent8f0d8163b50e01f398b14bcd4dc039ac5ab18d64 (diff)
downloadlinux-a405387c6825b1fc1956e22b10160b0f31536f3f.tar.xz
ASoC: tlv320aic32x4: Fix problem with first capture.
In its previous status, the first capture didn't work properly; nothing was actually recorded from the microphone. This behaviour was observed using a Visstrim M10 board. In order to solve this BUG a workaround has been added that, during the initialization process of the codec, powers on and off the ADC. The issue seems related to a HW BUG or some behavior that is not documented in the datasheet. Signed-off-by: Javier Martin <javier.martin@vista-silicon.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
-rw-r--r--sound/soc/codecs/tlv320aic32x4.c10
-rw-r--r--sound/soc/codecs/tlv320aic32x4.h3
2 files changed, 13 insertions, 0 deletions
diff --git a/sound/soc/codecs/tlv320aic32x4.c b/sound/soc/codecs/tlv320aic32x4.c
index f230292..d7d0e18 100644
--- a/sound/soc/codecs/tlv320aic32x4.c
+++ b/sound/soc/codecs/tlv320aic32x4.c
@@ -675,6 +675,16 @@ static int aic32x4_probe(struct snd_soc_codec *codec)
ARRAY_SIZE(aic32x4_snd_controls));
aic32x4_add_widgets(codec);
+ /*
+ * Workaround: for an unknown reason, the ADC needs to be powered up
+ * and down for the first capture to work properly. It seems related to
+ * a HW BUG or some kind of behavior not documented in the datasheet.
+ */
+ tmp_reg = snd_soc_read(codec, AIC32X4_ADCSETUP);
+ snd_soc_write(codec, AIC32X4_ADCSETUP, tmp_reg |
+ AIC32X4_LADC_EN | AIC32X4_RADC_EN);
+ snd_soc_write(codec, AIC32X4_ADCSETUP, tmp_reg);
+
return 0;
}
diff --git a/sound/soc/codecs/tlv320aic32x4.h b/sound/soc/codecs/tlv320aic32x4.h
index aae2b24..3577422 100644
--- a/sound/soc/codecs/tlv320aic32x4.h
+++ b/sound/soc/codecs/tlv320aic32x4.h
@@ -94,6 +94,9 @@
#define AIC32X4_WORD_LEN_24BITS 0x02
#define AIC32X4_WORD_LEN_32BITS 0x03
+#define AIC32X4_LADC_EN (1 << 7)
+#define AIC32X4_RADC_EN (1 << 6)
+
#define AIC32X4_I2S_MODE 0x00
#define AIC32X4_DSP_MODE 0x01
#define AIC32X4_RIGHT_JUSTIFIED_MODE 0x02