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| author | Mauro Carvalho Chehab <mchehab@redhat.com> | 2009-06-29 14:03:22 (GMT) |
|---|---|---|
| committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2009-07-05 17:30:02 (GMT) |
| commit | afe09f821ffa733d1cbfbf4e7cc41bd1cb8dcffb (patch) | |
| tree | 46012f932358429ba0831c31db890ca92bbd7aba | |
| parent | 7dfba00d05f3c7db9510f3b54a472981cf1521af (diff) | |
| download | linux-afe09f821ffa733d1cbfbf4e7cc41bd1cb8dcffb.tar.xz | |
V4L/DVB (12136): mt9v011: Some fixes at the register initialization table
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
| -rw-r--r-- | drivers/media/video/mt9v011.c | 20 |
1 files changed, 14 insertions, 6 deletions
diff --git a/drivers/media/video/mt9v011.c b/drivers/media/video/mt9v011.c index 4389197..cd5e119 100644 --- a/drivers/media/video/mt9v011.c +++ b/drivers/media/video/mt9v011.c @@ -117,17 +117,25 @@ struct i2c_reg_value { * Some values are marked as Reserved at the datasheet */ static const struct i2c_reg_value mt9v011_init_default[] = { - /* guessed meaning - as mt9m111 */ { R0D_MT9V011_RESET, 0x0001 }, { R0D_MT9V011_RESET, 0x0000 }, + { R01_MT9V011_ROWSTART, 0x0008 }, { R02_MT9V011_COLSTART, 0x0014 }, { R03_MT9V011_HEIGHT, 0x01e0 }, { R04_MT9V011_WIDTH, 0x0280 }, - { R05_MT9V011_HBLANK, 0x0001 }, - { R05_MT9V011_HBLANK, 0x0001 }, + { R05_MT9V011_HBLANK, 0x007b }, + { R06_MT9V011_VBLANK, 0x001c }, + { R09_MT9V011_SHUTTER_WIDTH, 0x0418 }, { R0A_MT9V011_CLK_SPEED, 0x0000 }, - { R05_MT9V011_HBLANK, 0x000a }, + { R0C_MT9V011_SHUTTER_DELAY, 0x0000 }, + { R1E_MT9V011_DIGITAL_ZOOM, 0x0000 }, + { R20_MT9V011_READ_MODE, 0x1100 }, + + /* + * Those registers are not docummented at the datasheet. + * However, the original driver initializes them + */ { 0x30, 0x0005 }, { 0x34, 0x0100 }, { 0x3d, 0x068f }, @@ -136,8 +144,8 @@ static const struct i2c_reg_value mt9v011_init_default[] = { { 0x58, 0x0038 }, /* Datasheet default 0x0078 */ { 0x59, 0x0723 }, /* Datasheet default 0x0703 */ { 0x62, 0x041a }, /* Datasheet default 0x0418 */ - { R09_MT9V011_SHUTTER_WIDTH, 0x0418 }, - { R20_MT9V011_READ_MODE, 0x1100 }, + + { R07_MT9V011_OUT_CTRL, 0x000a }, /* chip enable */ }; static void set_balance(struct v4l2_subdev *sd) |