diff options
author | James Liao <jamesjj.liao@mediatek.com> | 2015-10-07 09:14:41 (GMT) |
---|---|---|
committer | Matthias Brugger <matthias.bgg@gmail.com> | 2015-10-14 13:43:13 (GMT) |
commit | e34573c95a1416b4f26a5cc68b1de198e6b27ad7 (patch) | |
tree | cb0134d78921676f0f2f9d09f601e967b94ade40 | |
parent | 67e56c5651d30cd5adddcf32ab41c71dabf2bcec (diff) | |
download | linux-e34573c95a1416b4f26a5cc68b1de198e6b27ad7.tar.xz |
arm64: dts: mt8173: Add clocks for SCPSYS unit
Add clocks needed by Mediatek VENC and VENC_LT power domianis.
These clocks were needed by accessing subsystem's registers,
so they need to be enabled before power on these subsystems.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
-rw-r--r-- | arch/arm64/boot/dts/mediatek/mt8173.dtsi | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi index 42540b2..ec4a99d 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi @@ -234,8 +234,10 @@ #power-domain-cells = <1>; reg = <0 0x10006000 0 0x1000>; clocks = <&clk26m>, - <&topckgen CLK_TOP_MM_SEL>; - clock-names = "mfg", "mm"; + <&topckgen CLK_TOP_MM_SEL>, + <&topckgen CLK_TOP_VENC_SEL>, + <&topckgen CLK_TOP_VENC_LT_SEL>; + clock-names = "mfg", "mm", "venc", "venc_lt"; infracfg = <&infracfg>; }; |