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| author | Zhang Ying-22455 <ying.zhang22455@nxp.com> | 2017-11-02 02:36:48 (GMT) |
|---|---|---|
| committer | Xie Xiaobo <xiaobo.xie@nxp.com> | 2017-12-12 09:38:28 (GMT) |
| commit | e8ac3011f1160155997ce391efa7f37cc08ae836 (patch) | |
| tree | 35533d832d97a4030bd5fca3267559c408ced5fc | |
| parent | 405c970bc3056aac578feeec24b1a58056931c69 (diff) | |
| download | linux-e8ac3011f1160155997ce391efa7f37cc08ae836.tar.xz | |
arm64: dts: ls1088a: correct the i2c clock to 1/8 platform pll
Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi index dc5d7f6..9aa4483 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi @@ -523,7 +523,7 @@ #size-cells = <0>; reg = <0x0 0x2000000 0x0 0x10000>; interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clockgen 4 3>; + clocks = <&clockgen 4 7>; status = "disabled"; }; @@ -533,7 +533,7 @@ #size-cells = <0>; reg = <0x0 0x2010000 0x0 0x10000>; interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clockgen 4 3>; + clocks = <&clockgen 4 7>; status = "disabled"; }; @@ -543,7 +543,7 @@ #size-cells = <0>; reg = <0x0 0x2020000 0x0 0x10000>; interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clockgen 4 3>; + clocks = <&clockgen 4 7>; status = "disabled"; }; @@ -553,7 +553,7 @@ #size-cells = <0>; reg = <0x0 0x2030000 0x0 0x10000>; interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clockgen 4 3>; + clocks = <&clockgen 4 7>; status = "disabled"; }; |