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author | Benoit Cousson <b-cousson@ti.com> | 2011-02-02 19:27:21 (GMT) |
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committer | Benoit Cousson <b-cousson@ti.com> | 2011-02-17 17:25:33 (GMT) |
commit | ec5df927a8f3d3eca9514c9a9ad6db830ae20acc (patch) | |
tree | e0615dc99d7b80d177ea11e9c5faea97595f53b2 | |
parent | d63bd74fbb5fb2161d9cb90cd7a93a2c5db47c63 (diff) | |
download | linux-ec5df927a8f3d3eca9514c9a9ad6db830ae20acc.tar.xz |
OMAP4: hwmod data: Add mailbox
Mailbox hwmod data for omap4.
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Omar Ramirez Luna <omar.ramirez@ti.com>
[b-cousson@ti.com: Re-order the structures
and remove the irq line name]
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 68 |
1 files changed, 67 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index aafe60d..efdf266 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -530,7 +530,6 @@ static struct omap_hwmod omap44xx_mpu_private_hwmod = { * ipu * iss * kbd - * mailbox * mcasp * mcbsp1 * mcbsp2 @@ -2006,6 +2005,70 @@ static struct omap_hwmod omap44xx_iva_hwmod = { }; /* + * 'mailbox' class + * mailbox module allowing communication between the on-chip processors using a + * queued mailbox-interrupt mechanism. + */ + +static struct omap_hwmod_class_sysconfig omap44xx_mailbox_sysc = { + .rev_offs = 0x0000, + .sysc_offs = 0x0010, + .sysc_flags = (SYSC_HAS_RESET_STATUS | SYSC_HAS_SIDLEMODE | + SYSC_HAS_SOFTRESET), + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), + .sysc_fields = &omap_hwmod_sysc_type2, +}; + +static struct omap_hwmod_class omap44xx_mailbox_hwmod_class = { + .name = "mailbox", + .sysc = &omap44xx_mailbox_sysc, +}; + +/* mailbox */ +static struct omap_hwmod omap44xx_mailbox_hwmod; +static struct omap_hwmod_irq_info omap44xx_mailbox_irqs[] = { + { .irq = 26 + OMAP44XX_IRQ_GIC_START }, +}; + +static struct omap_hwmod_addr_space omap44xx_mailbox_addrs[] = { + { + .pa_start = 0x4a0f4000, + .pa_end = 0x4a0f41ff, + .flags = ADDR_TYPE_RT + }, +}; + +/* l4_cfg -> mailbox */ +static struct omap_hwmod_ocp_if omap44xx_l4_cfg__mailbox = { + .master = &omap44xx_l4_cfg_hwmod, + .slave = &omap44xx_mailbox_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_mailbox_addrs, + .addr_cnt = ARRAY_SIZE(omap44xx_mailbox_addrs), + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* mailbox slave ports */ +static struct omap_hwmod_ocp_if *omap44xx_mailbox_slaves[] = { + &omap44xx_l4_cfg__mailbox, +}; + +static struct omap_hwmod omap44xx_mailbox_hwmod = { + .name = "mailbox", + .class = &omap44xx_mailbox_hwmod_class, + .mpu_irqs = omap44xx_mailbox_irqs, + .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mailbox_irqs), + .prcm = { + .omap4 = { + .clkctrl_reg = OMAP4430_CM_L4CFG_MAILBOX_CLKCTRL, + }, + }, + .slaves = omap44xx_mailbox_slaves, + .slaves_cnt = ARRAY_SIZE(omap44xx_mailbox_slaves), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), +}; + +/* * 'mcspi' class * multichannel serial port interface (mcspi) / master/slave synchronous serial * bus @@ -3539,6 +3602,9 @@ static __initdata struct omap_hwmod *omap44xx_hwmods[] = { &omap44xx_iva_seq0_hwmod, &omap44xx_iva_seq1_hwmod, + /* mailbox class */ + &omap44xx_mailbox_hwmod, + /* mcspi class */ &omap44xx_mcspi1_hwmod, &omap44xx_mcspi2_hwmod, |