diff options
| author | Minghuan Lian <Minghuan.Lian@nxp.com> | 2017-11-16 06:15:42 (GMT) |
|---|---|---|
| committer | Xie Xiaobo <xiaobo.xie@nxp.com> | 2017-12-12 07:32:39 (GMT) |
| commit | f0246a5e725d513c0552407f7694806fe437207c (patch) | |
| tree | 037107f48f0b994fa639da1d4d878bc3cfb7ad6c | |
| parent | 5d8e97f7edab13e38fd94f2260a39a12285cb220 (diff) | |
| download | linux-f0246a5e725d513c0552407f7694806fe437207c.tar.xz | |
PCI: layerscape: Change default error response behavior
[modify to adapt to 4.9, pcie have member pp instead of pci]
By default, when the PCIe controller experiences an erroneous completion
from an external completer for its outbound non-posted request, it sends
an OKAY response to the device's internal AXI slave system interface.
However, this default system error response behavior cannot be used for
other types of outbound non-posted requests. For example, the outbound
memory read transaction requires an actual ERROR response, like UR
completion or completion timeout.
Fix this by forwarding the error response of the non-posted request.
Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Integrated-by: Zhao Qiang <qiang.zhao@nxp.com>
| -rw-r--r-- | drivers/pci/host/pci-layerscape.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/pci/host/pci-layerscape.c b/drivers/pci/host/pci-layerscape.c index 116ff73..2da7ce1 100644 --- a/drivers/pci/host/pci-layerscape.c +++ b/drivers/pci/host/pci-layerscape.c @@ -33,6 +33,8 @@ /* PEX Internal Configuration Registers */ #define PCIE_STRFMR1 0x71c /* Symbol Timer & Filter Mask Register1 */ +#define PCIE_ABSERR 0x8d0 /* Bridge Slave Error Response Register */ +#define PCIE_ABSERR_SETTING 0x9401 /* Forward error of non-posted request */ #define PCIE_DBI_RO_WR_EN 0x8bc /* DBI Read-Only Write Enable Register */ #define PCIE_IATU_NUM 6 @@ -154,6 +156,12 @@ static int ls_pcie_link_up(struct pcie_port *pp) return 1; } +/* Forward error response of outbound non-posted requests */ +static void ls_pcie_fix_error_response(struct ls_pcie *pcie) +{ + iowrite32(PCIE_ABSERR_SETTING, pcie->pp.dbi_base + PCIE_ABSERR); +} + static void ls_pcie_host_init(struct pcie_port *pp) { struct ls_pcie *pcie = to_ls_pcie(pp); @@ -165,6 +173,7 @@ static void ls_pcie_host_init(struct pcie_port *pp) iowrite32(0, pcie->pp.dbi_base + PCIE_DBI_RO_WR_EN); ls_pcie_disable_outbound_atus(pcie); + ls_pcie_fix_error_response(pcie); dw_pcie_setup_rc(pp); } |