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authorSaeed Bishara <saeed@marvell.com>2008-05-05 06:25:52 (GMT)
committerNicolas Pitre <nico@cam.org>2008-06-30 20:04:45 (GMT)
commitf4db56ffd43a810424866fac6de9a32486415316 (patch)
treee135966517865ea136b467b39711f1fc0b1194b9
parent395aed6de6d063bc234a179d65d3b6d720ce589a (diff)
downloadlinux-f4db56ffd43a810424866fac6de9a32486415316.tar.xz
[MTD] orion_nand: add chip_delay parameter
Some SoCs need a different chip_delay value. Signed-off-by: Saeed Bishara <saeed@marvell.com> Acked-by: Jörn Engel <joern@logfs.org> Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
-rw-r--r--drivers/mtd/nand/orion_nand.c3
-rw-r--r--include/asm-arm/plat-orion/orion_nand.h1
2 files changed, 4 insertions, 0 deletions
diff --git a/drivers/mtd/nand/orion_nand.c b/drivers/mtd/nand/orion_nand.c
index 59e05a1..ee2ac39 100644
--- a/drivers/mtd/nand/orion_nand.c
+++ b/drivers/mtd/nand/orion_nand.c
@@ -85,6 +85,9 @@ static int __init orion_nand_probe(struct platform_device *pdev)
nc->cmd_ctrl = orion_nand_cmd_ctrl;
nc->ecc.mode = NAND_ECC_SOFT;
+ if (board->chip_delay)
+ nc->chip_delay = board->chip_delay;
+
if (board->width == 16)
nc->options |= NAND_BUSWIDTH_16;
diff --git a/include/asm-arm/plat-orion/orion_nand.h b/include/asm-arm/plat-orion/orion_nand.h
index ffd3852..ad4ce94 100644
--- a/include/asm-arm/plat-orion/orion_nand.h
+++ b/include/asm-arm/plat-orion/orion_nand.h
@@ -18,6 +18,7 @@ struct orion_nand_data {
u8 ale; /* address line number connected to ALE */
u8 cle; /* address line number connected to CLE */
u8 width; /* buswidth */
+ u8 chip_delay;
};