summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorSergey Ryazanov <ryazanov.s.a@gmail.com>2014-10-28 23:18:45 (GMT)
committerRalf Baechle <ralf@linux-mips.org>2014-11-24 06:45:28 (GMT)
commit1654861f6e02e74a2ba059d1f62dc0356429d7cf (patch)
tree06ca7f47a494bf1e24bd186e2b82a95d1e2ced25
parenta7473717483ef3bb78563611bf1b3b82c5515b2e (diff)
downloadlinux-1654861f6e02e74a2ba059d1f62dc0356429d7cf.tar.xz
MIPS: ath25: add SoC type detection
Detect SoC type based on device ID and board configuration data. Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> Cc: Linux MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/8244/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/ath25/ar2315.c22
-rw-r--r--arch/mips/ath25/ar5312.c23
-rw-r--r--arch/mips/ath25/devices.c17
-rw-r--r--arch/mips/ath25/devices.h16
4 files changed, 77 insertions, 1 deletions
diff --git a/arch/mips/ath25/ar2315.c b/arch/mips/ath25/ar2315.c
index 3ba8e75..52805b7 100644
--- a/arch/mips/ath25/ar2315.c
+++ b/arch/mips/ath25/ar2315.c
@@ -24,6 +24,8 @@
#include <asm/reboot.h>
#include <asm/time.h>
+#include <ath25_platform.h>
+
#include "devices.h"
#include "ar2315.h"
#include "ar2315_regs.h"
@@ -249,6 +251,7 @@ void __init ar2315_plat_mem_setup(void)
{
void __iomem *sdram_base;
u32 memsize, memcfg;
+ u32 devid;
u32 config;
/* Detect memory size */
@@ -264,6 +267,25 @@ void __init ar2315_plat_mem_setup(void)
ar2315_rst_base = ioremap_nocache(AR2315_RST_BASE, AR2315_RST_SIZE);
+ /* Detect the hardware based on the device ID */
+ devid = ar2315_rst_reg_read(AR2315_SREV) & AR2315_REV_CHIP;
+ switch (devid) {
+ case 0x91: /* Need to check */
+ ath25_soc = ATH25_SOC_AR2318;
+ break;
+ case 0x90:
+ ath25_soc = ATH25_SOC_AR2317;
+ break;
+ case 0x87:
+ ath25_soc = ATH25_SOC_AR2316;
+ break;
+ case 0x86:
+ default:
+ ath25_soc = ATH25_SOC_AR2315;
+ break;
+ }
+ ath25_board.devid = devid;
+
/* Clear any lingering AHB errors */
config = read_c0_config();
write_c0_config(config & ~0x3);
diff --git a/arch/mips/ath25/ar5312.c b/arch/mips/ath25/ar5312.c
index 41bd56d..26942a2 100644
--- a/arch/mips/ath25/ar5312.c
+++ b/arch/mips/ath25/ar5312.c
@@ -24,6 +24,8 @@
#include <asm/reboot.h>
#include <asm/time.h>
+#include <ath25_platform.h>
+
#include "devices.h"
#include "ar5312.h"
#include "ar5312_regs.h"
@@ -191,10 +193,25 @@ static void __init ar5312_flash_init(void)
void __init ar5312_init_devices(void)
{
+ struct ath25_boarddata *config;
+
ar5312_flash_init();
/* Locate board/radio config data */
ath25_find_config(AR5312_FLASH_BASE, AR5312_FLASH_SIZE);
+ config = ath25_board.config;
+
+ /* AR2313 has CPU minor rev. 10 */
+ if ((current_cpu_data.processor_id & 0xff) == 0x0a)
+ ath25_soc = ATH25_SOC_AR2313;
+
+ /* AR2312 shares the same Silicon ID as AR5312 */
+ else if (config->flags & BD_ISCASPER)
+ ath25_soc = ATH25_SOC_AR2312;
+
+ /* Everything else is probably AR5312 or compatible */
+ else
+ ath25_soc = ATH25_SOC_AR5312;
}
static void ar5312_restart(char *command)
@@ -282,6 +299,7 @@ void __init ar5312_plat_mem_setup(void)
{
void __iomem *sdram_base;
u32 memsize, memcfg, bank0_ac, bank1_ac;
+ u32 devid;
/* Detect memory size */
sdram_base = ioremap_nocache(AR5312_SDRAMCTL_BASE,
@@ -297,6 +315,11 @@ void __init ar5312_plat_mem_setup(void)
ar5312_rst_base = ioremap_nocache(AR5312_RST_BASE, AR5312_RST_SIZE);
+ devid = ar5312_rst_reg_read(AR5312_REV);
+ devid >>= AR5312_REV_WMAC_MIN_S;
+ devid &= AR5312_REV_CHIP;
+ ath25_board.devid = (u16)devid;
+
/* Clear any lingering AHB errors */
ar5312_rst_reg_read(AR5312_PROCADDR);
ar5312_rst_reg_read(AR5312_DMAADDR);
diff --git a/arch/mips/ath25/devices.c b/arch/mips/ath25/devices.c
index d24dbb1..6218547 100644
--- a/arch/mips/ath25/devices.c
+++ b/arch/mips/ath25/devices.c
@@ -9,10 +9,25 @@
#include "ar2315.h"
struct ar231x_board_config ath25_board;
+enum ath25_soc_type ath25_soc = ATH25_SOC_UNKNOWN;
+
+static const char * const soc_type_strings[] = {
+ [ATH25_SOC_AR5312] = "Atheros AR5312",
+ [ATH25_SOC_AR2312] = "Atheros AR2312",
+ [ATH25_SOC_AR2313] = "Atheros AR2313",
+ [ATH25_SOC_AR2315] = "Atheros AR2315",
+ [ATH25_SOC_AR2316] = "Atheros AR2316",
+ [ATH25_SOC_AR2317] = "Atheros AR2317",
+ [ATH25_SOC_AR2318] = "Atheros AR2318",
+ [ATH25_SOC_UNKNOWN] = "Atheros (unknown)",
+};
const char *get_system_type(void)
{
- return "Atheros (unknown)";
+ if ((ath25_soc >= ARRAY_SIZE(soc_type_strings)) ||
+ !soc_type_strings[ath25_soc])
+ return soc_type_strings[ATH25_SOC_UNKNOWN];
+ return soc_type_strings[ath25_soc];
}
void __init ath25_serial_setup(u32 mapbase, int irq, unsigned int uartclk)
diff --git a/arch/mips/ath25/devices.h b/arch/mips/ath25/devices.h
index 65e86cc..55adcf4 100644
--- a/arch/mips/ath25/devices.h
+++ b/arch/mips/ath25/devices.h
@@ -7,6 +7,22 @@
#define ATH25_IRQ_CPU_CLOCK (MIPS_CPU_IRQ_BASE + 7) /* C0_CAUSE: 0x8000 */
+enum ath25_soc_type {
+ /* handled by ar5312.c */
+ ATH25_SOC_AR2312,
+ ATH25_SOC_AR2313,
+ ATH25_SOC_AR5312,
+
+ /* handled by ar2315.c */
+ ATH25_SOC_AR2315,
+ ATH25_SOC_AR2316,
+ ATH25_SOC_AR2317,
+ ATH25_SOC_AR2318,
+
+ ATH25_SOC_UNKNOWN
+};
+
+extern enum ath25_soc_type ath25_soc;
extern struct ar231x_board_config ath25_board;
extern void (*ath25_irq_dispatch)(void);