diff options
author | Javier Martinez Canillas <javier@osg.samsung.com> | 2015-11-13 04:53:40 (GMT) |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2015-11-30 16:43:19 (GMT) |
commit | 22a1cd8a788f78375c1fe42418a31ee732de171a (patch) | |
tree | a5b3bbc3e23045233d4f7d222e2dea2fdac05420 | |
parent | fc63efdf4bbcc23968bc71cfbc7dedf56c5ff01e (diff) | |
download | linux-22a1cd8a788f78375c1fe42418a31ee732de171a.tar.xz |
ARM: dts: am335x-baltos-ir5221: Remove leftover pinctrl lines
When the Device Tree source file got merged, some commented pinctrl lines
were left in the file. These are already defined so seems to be a cleanup
that was missed. Delete the unneeded lines from the file.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
-rw-r--r-- | arch/arm/boot/dts/am335x-baltos-ir5221.dts | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/am335x-baltos-ir5221.dts b/arch/arm/boot/dts/am335x-baltos-ir5221.dts index 7d36601..3b42635 100644 --- a/arch/arm/boot/dts/am335x-baltos-ir5221.dts +++ b/arch/arm/boot/dts/am335x-baltos-ir5221.dts @@ -109,8 +109,6 @@ pinctrl-single,pins = < 0x180 0x28 /* uart1_rxd, INPUT | MODE0 */ 0x184 0x28 /* uart1_txd, INPUT | MODE0 */ - /*0x178 0x28*/ /* uart1_ctsn, INPUT | MODE0 */ - /*0x17c 0x08*/ /* uart1_rtsn, OUTPUT | MODE0 */ 0x178 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* uart1_ctsn, INPUT | MODE0 */ 0x17c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* uart1_rtsn, OUTPUT | MODE0 */ 0x0e0 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* lcd_vsync.gpio2[22] DTR */ @@ -124,8 +122,6 @@ pinctrl-single,pins = < 0x150 0x29 /* spi0_sclk.uart2_rxd_mux3, INPUT | MODE1 */ 0x154 0x09 /* spi0_d0.uart2_txd_mux3, OUTPUT | MODE1 */ - /*0x188 0x2a*/ /* i2c0_sda.uart2_ctsn_mux0, INPUT | MODE2 */ - /*0x18c 0x2a*/ /* i2c0_scl.uart2_rtsn_mux0, INPUT | MODE2 */ 0x188 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* i2c0_sda.uart2_ctsn_mux0 */ 0x18c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* i2c0_scl.uart2_rtsn_mux0 */ 0x030 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad12.gpio1[12] DTR */ |