diff options
author | Rabin Vincent <rabin@rab.in> | 2015-02-19 16:35:28 (GMT) |
---|---|---|
committer | Jesper Nilsson <jespern@axis.com> | 2015-03-25 09:55:10 (GMT) |
commit | 47a8f6fb349c977ff752f979b159aef96a0bb352 (patch) | |
tree | 53c52b00d97eb5b0e284b67d66f09ed7ab9a5744 | |
parent | 06aca92424c2a53a9e26cb81c1d6a829af9491b8 (diff) | |
download | linux-47a8f6fb349c977ff752f979b159aef96a0bb352.tar.xz |
CRIS: remove SMP code
The CRIS SMP code cannot be built since there is no (and appears to
never have been) a CONFIG_SMP Kconfig option in arch/cris/. Remove it.
Signed-off-by: Rabin Vincent <rabin@rab.in>
Signed-off-by: Jesper Nilsson <jespern@axis.com>
-rw-r--r-- | arch/cris/Kconfig | 1 | ||||
-rw-r--r-- | arch/cris/arch-v32/kernel/Makefile | 1 | ||||
-rw-r--r-- | arch/cris/arch-v32/kernel/head.S | 32 | ||||
-rw-r--r-- | arch/cris/arch-v32/kernel/irq.c | 3 | ||||
-rw-r--r-- | arch/cris/arch-v32/kernel/setup.c | 5 | ||||
-rw-r--r-- | arch/cris/arch-v32/kernel/smp.c | 358 | ||||
-rw-r--r-- | arch/cris/arch-v32/kernel/time.c | 3 | ||||
-rw-r--r-- | arch/cris/arch-v32/lib/Makefile | 2 | ||||
-rw-r--r-- | arch/cris/arch-v32/lib/spinlock.S | 40 | ||||
-rw-r--r-- | arch/cris/arch-v32/mm/init.c | 11 | ||||
-rw-r--r-- | arch/cris/arch-v32/mm/mmu.S | 4 | ||||
-rw-r--r-- | arch/cris/include/arch-v32/arch/atomic.h | 28 | ||||
-rw-r--r-- | arch/cris/include/arch-v32/arch/spinlock.h | 131 | ||||
-rw-r--r-- | arch/cris/include/asm/cmpxchg.h | 2 | ||||
-rw-r--r-- | arch/cris/include/asm/smp.h | 10 | ||||
-rw-r--r-- | arch/cris/include/asm/spinlock.h | 1 | ||||
-rw-r--r-- | arch/cris/include/asm/tlbflush.h | 7 |
17 files changed, 1 insertions, 638 deletions
diff --git a/arch/cris/Kconfig b/arch/cris/Kconfig index 23fb82f..97d3936 100644 --- a/arch/cris/Kconfig +++ b/arch/cris/Kconfig @@ -46,7 +46,6 @@ config CRIS select ARCH_WANT_IPC_PARSE_VERSION select GENERIC_IRQ_SHOW select GENERIC_IOMAP - select GENERIC_SMP_IDLE_THREAD if ETRAX_ARCH_V32 select GENERIC_CMOS_UPDATE select MODULES_USE_ELF_RELA select CLONE_BACKWARDS2 diff --git a/arch/cris/arch-v32/kernel/Makefile b/arch/cris/arch-v32/kernel/Makefile index 4035835..d9fc617 100644 --- a/arch/cris/arch-v32/kernel/Makefile +++ b/arch/cris/arch-v32/kernel/Makefile @@ -9,7 +9,6 @@ obj-y := entry.o traps.o irq.o debugport.o \ process.o ptrace.o setup.o signal.o traps.o time.o \ cache.o cacheflush.o -obj-$(CONFIG_SMP) += smp.o obj-$(CONFIG_ETRAX_KGDB) += kgdb.o kgdb_asm.o obj-$(CONFIG_ETRAX_FAST_TIMER) += fasttimer.o obj-$(CONFIG_MODULES) += crisksyms.o diff --git a/arch/cris/arch-v32/kernel/head.S b/arch/cris/arch-v32/kernel/head.S index 51e3416..74a66e0 100644 --- a/arch/cris/arch-v32/kernel/head.S +++ b/arch/cris/arch-v32/kernel/head.S @@ -52,11 +52,6 @@ tstart: GIO_INIT -#ifdef CONFIG_SMP -secondary_cpu_entry: /* Entry point for secondary CPUs */ - di -#endif - ;; Setup and enable the MMU. Use same configuration for both the data ;; and the instruction MMU. ;; @@ -164,33 +159,6 @@ secondary_cpu_entry: /* Entry point for secondary CPUs */ nop nop -#ifdef CONFIG_SMP - ;; Read CPU ID - move 0, $srs - nop - nop - nop - move $s12, $r0 - cmpq 0, $r0 - beq master_cpu - nop -slave_cpu: - ; Time to boot-up. Get stack location provided by master CPU. - move.d smp_init_current_idle_thread, $r1 - move.d [$r1], $sp - add.d 8192, $sp - move.d ebp_start, $r0 ; Defined in linker-script. - move $r0, $ebp - jsr smp_callin - nop -master_cpu: - /* Set up entry point for secondary CPUs. The boot ROM has set up - * EBP at start of internal memory. The CPU will get there - * later when we issue an IPI to them... */ - move.d MEM_INTMEM_START + IPI_INTR_VECT * 4, $r0 - move.d secondary_cpu_entry, $r1 - move.d $r1, [$r0] -#endif ; Check if starting from DRAM (network->RAM boot or unpacked ; compressed kernel), or directly from flash. lapcq ., $r0 diff --git a/arch/cris/arch-v32/kernel/irq.c b/arch/cris/arch-v32/kernel/irq.c index bc871d2..6a881e0 100644 --- a/arch/cris/arch-v32/kernel/irq.c +++ b/arch/cris/arch-v32/kernel/irq.c @@ -58,9 +58,6 @@ struct cris_irq_allocation irq_allocations[NR_REAL_IRQS] = static unsigned long irq_regs[NR_CPUS] = { regi_irq, -#ifdef CONFIG_SMP - regi_irq2, -#endif }; #if NR_REAL_IRQS > 32 diff --git a/arch/cris/arch-v32/kernel/setup.c b/arch/cris/arch-v32/kernel/setup.c index 61e10ae..231927b 100644 --- a/arch/cris/arch-v32/kernel/setup.c +++ b/arch/cris/arch-v32/kernel/setup.c @@ -63,11 +63,6 @@ int show_cpuinfo(struct seq_file *m, void *v) info = &cpinfo[ARRAY_SIZE(cpinfo) - 1]; -#ifdef CONFIG_SMP - if (!cpu_online(cpu)) - return 0; -#endif - revision = rdvr(); for (i = 0; i < ARRAY_SIZE(cpinfo); i++) { diff --git a/arch/cris/arch-v32/kernel/smp.c b/arch/cris/arch-v32/kernel/smp.c deleted file mode 100644 index 0698582..0000000 --- a/arch/cris/arch-v32/kernel/smp.c +++ /dev/null @@ -1,358 +0,0 @@ -#include <linux/types.h> -#include <asm/delay.h> -#include <irq.h> -#include <hwregs/intr_vect.h> -#include <hwregs/intr_vect_defs.h> -#include <asm/tlbflush.h> -#include <asm/mmu_context.h> -#include <hwregs/asm/mmu_defs_asm.h> -#include <hwregs/supp_reg.h> -#include <linux/atomic.h> - -#include <linux/err.h> -#include <linux/init.h> -#include <linux/timex.h> -#include <linux/sched.h> -#include <linux/kernel.h> -#include <linux/cpumask.h> -#include <linux/interrupt.h> -#include <linux/module.h> - -#define IPI_SCHEDULE 1 -#define IPI_CALL 2 -#define IPI_FLUSH_TLB 4 -#define IPI_BOOT 8 - -#define FLUSH_ALL (void*)0xffffffff - -/* Vector of locks used for various atomic operations */ -spinlock_t cris_atomic_locks[] = { - [0 ... LOCK_COUNT - 1] = __SPIN_LOCK_UNLOCKED(cris_atomic_locks) -}; - -/* CPU masks */ -cpumask_t phys_cpu_present_map = CPU_MASK_NONE; -EXPORT_SYMBOL(phys_cpu_present_map); - -/* Variables used during SMP boot */ -volatile int cpu_now_booting = 0; -volatile struct thread_info *smp_init_current_idle_thread; - -/* Variables used during IPI */ -static DEFINE_SPINLOCK(call_lock); -static DEFINE_SPINLOCK(tlbstate_lock); - -struct call_data_struct { - void (*func) (void *info); - void *info; - int wait; -}; - -static struct call_data_struct * call_data; - -static struct mm_struct* flush_mm; -static struct vm_area_struct* flush_vma; -static unsigned long flush_addr; - -/* Mode registers */ -static unsigned long irq_regs[NR_CPUS] = { - regi_irq, - regi_irq2 -}; - -static irqreturn_t crisv32_ipi_interrupt(int irq, void *dev_id); -static int send_ipi(int vector, int wait, cpumask_t cpu_mask); -static struct irqaction irq_ipi = { - .handler = crisv32_ipi_interrupt, - .flags = 0, - .name = "ipi", -}; - -extern void cris_mmu_init(void); -extern void cris_timer_init(void); - -/* SMP initialization */ -void __init smp_prepare_cpus(unsigned int max_cpus) -{ - int i; - - /* From now on we can expect IPIs so set them up */ - setup_irq(IPI_INTR_VECT, &irq_ipi); - - /* Mark all possible CPUs as present */ - for (i = 0; i < max_cpus; i++) - cpumask_set_cpu(i, &phys_cpu_present_map); -} - -void smp_prepare_boot_cpu(void) -{ - /* PGD pointer has moved after per_cpu initialization so - * update the MMU. - */ - pgd_t **pgd; - pgd = (pgd_t**)&per_cpu(current_pgd, smp_processor_id()); - - SUPP_BANK_SEL(1); - SUPP_REG_WR(RW_MM_TLB_PGD, pgd); - SUPP_BANK_SEL(2); - SUPP_REG_WR(RW_MM_TLB_PGD, pgd); - - set_cpu_online(0, true); - cpumask_set_cpu(0, &phys_cpu_present_map); - set_cpu_possible(0, true); -} - -void __init smp_cpus_done(unsigned int max_cpus) -{ -} - -/* Bring one cpu online.*/ -static int __init -smp_boot_one_cpu(int cpuid, struct task_struct idle) -{ - unsigned timeout; - cpumask_t cpu_mask; - - cpumask_clear(&cpu_mask); - task_thread_info(idle)->cpu = cpuid; - - /* Information to the CPU that is about to boot */ - smp_init_current_idle_thread = task_thread_info(idle); - cpu_now_booting = cpuid; - - /* Kick it */ - set_cpu_online(cpuid, true); - cpumask_set_cpu(cpuid, &cpu_mask); - send_ipi(IPI_BOOT, 0, cpu_mask); - set_cpu_online(cpuid, false); - - /* Wait for CPU to come online */ - for (timeout = 0; timeout < 10000; timeout++) { - if(cpu_online(cpuid)) { - cpu_now_booting = 0; - smp_init_current_idle_thread = NULL; - return 0; /* CPU online */ - } - udelay(100); - barrier(); - } - - printk(KERN_CRIT "SMP: CPU:%d is stuck.\n", cpuid); - return -1; -} - -/* Secondary CPUs starts using C here. Here we need to setup CPU - * specific stuff such as the local timer and the MMU. */ -void __init smp_callin(void) -{ - int cpu = cpu_now_booting; - reg_intr_vect_rw_mask vect_mask = {0}; - - /* Initialise the idle task for this CPU */ - atomic_inc(&init_mm.mm_count); - current->active_mm = &init_mm; - - /* Set up MMU */ - cris_mmu_init(); - __flush_tlb_all(); - - /* Setup local timer. */ - cris_timer_init(); - - /* Enable IRQ and idle */ - REG_WR(intr_vect, irq_regs[cpu], rw_mask, vect_mask); - crisv32_unmask_irq(IPI_INTR_VECT); - crisv32_unmask_irq(TIMER0_INTR_VECT); - preempt_disable(); - notify_cpu_starting(cpu); - local_irq_enable(); - - set_cpu_online(cpu, true); - cpu_startup_entry(CPUHP_ONLINE); -} - -/* Stop execution on this CPU.*/ -void stop_this_cpu(void* dummy) -{ - local_irq_disable(); - asm volatile("halt"); -} - -/* Other calls */ -void smp_send_stop(void) -{ - smp_call_function(stop_this_cpu, NULL, 0); -} - -int setup_profiling_timer(unsigned int multiplier) -{ - return -EINVAL; -} - - -/* cache_decay_ticks is used by the scheduler to decide if a process - * is "hot" on one CPU. A higher value means a higher penalty to move - * a process to another CPU. Our cache is rather small so we report - * 1 tick. - */ -unsigned long cache_decay_ticks = 1; - -int __cpu_up(unsigned int cpu, struct task_struct *tidle) -{ - smp_boot_one_cpu(cpu, tidle); - return cpu_online(cpu) ? 0 : -ENOSYS; -} - -void smp_send_reschedule(int cpu) -{ - cpumask_t cpu_mask; - cpumask_clear(&cpu_mask); - cpumask_set_cpu(cpu, &cpu_mask); - send_ipi(IPI_SCHEDULE, 0, cpu_mask); -} - -/* TLB flushing - * - * Flush needs to be done on the local CPU and on any other CPU that - * may have the same mapping. The mm->cpu_vm_mask is used to keep track - * of which CPUs that a specific process has been executed on. - */ -void flush_tlb_common(struct mm_struct* mm, struct vm_area_struct* vma, unsigned long addr) -{ - unsigned long flags; - cpumask_t cpu_mask; - - spin_lock_irqsave(&tlbstate_lock, flags); - cpu_mask = (mm == FLUSH_ALL ? cpu_all_mask : *mm_cpumask(mm)); - cpumask_clear_cpu(smp_processor_id(), &cpu_mask); - flush_mm = mm; - flush_vma = vma; - flush_addr = addr; - send_ipi(IPI_FLUSH_TLB, 1, cpu_mask); - spin_unlock_irqrestore(&tlbstate_lock, flags); -} - -void flush_tlb_all(void) -{ - __flush_tlb_all(); - flush_tlb_common(FLUSH_ALL, FLUSH_ALL, 0); -} - -void flush_tlb_mm(struct mm_struct *mm) -{ - __flush_tlb_mm(mm); - flush_tlb_common(mm, FLUSH_ALL, 0); - /* No more mappings in other CPUs */ - cpumask_clear(mm_cpumask(mm)); - cpumask_set_cpu(smp_processor_id(), mm_cpumask(mm)); -} - -void flush_tlb_page(struct vm_area_struct *vma, - unsigned long addr) -{ - __flush_tlb_page(vma, addr); - flush_tlb_common(vma->vm_mm, vma, addr); -} - -/* Inter processor interrupts - * - * The IPIs are used for: - * * Force a schedule on a CPU - * * FLush TLB on other CPUs - * * Call a function on other CPUs - */ - -int send_ipi(int vector, int wait, cpumask_t cpu_mask) -{ - int i = 0; - reg_intr_vect_rw_ipi ipi = REG_RD(intr_vect, irq_regs[i], rw_ipi); - int ret = 0; - - /* Calculate CPUs to send to. */ - cpumask_and(&cpu_mask, &cpu_mask, cpu_online_mask); - - /* Send the IPI. */ - for_each_cpu(i, &cpu_mask) - { - ipi.vector |= vector; - REG_WR(intr_vect, irq_regs[i], rw_ipi, ipi); - } - - /* Wait for IPI to finish on other CPUS */ - if (wait) { - for_each_cpu(i, &cpu_mask) { - int j; - for (j = 0 ; j < 1000; j++) { - ipi = REG_RD(intr_vect, irq_regs[i], rw_ipi); - if (!ipi.vector) - break; - udelay(100); - } - - /* Timeout? */ - if (ipi.vector) { - printk("SMP call timeout from %d to %d\n", smp_processor_id(), i); - ret = -ETIMEDOUT; - dump_stack(); - } - } - } - return ret; -} - -/* - * You must not call this function with disabled interrupts or from a - * hardware interrupt handler or from a bottom half handler. - */ -int smp_call_function(void (*func)(void *info), void *info, int wait) -{ - cpumask_t cpu_mask; - struct call_data_struct data; - int ret; - - cpumask_setall(&cpu_mask); - cpumask_clear_cpu(smp_processor_id(), &cpu_mask); - - WARN_ON(irqs_disabled()); - - data.func = func; - data.info = info; - data.wait = wait; - - spin_lock(&call_lock); - call_data = &data; - ret = send_ipi(IPI_CALL, wait, cpu_mask); - spin_unlock(&call_lock); - - return ret; -} - -irqreturn_t crisv32_ipi_interrupt(int irq, void *dev_id) -{ - void (*func) (void *info) = call_data->func; - void *info = call_data->info; - reg_intr_vect_rw_ipi ipi; - - ipi = REG_RD(intr_vect, irq_regs[smp_processor_id()], rw_ipi); - - if (ipi.vector & IPI_SCHEDULE) { - scheduler_ipi(); - } - if (ipi.vector & IPI_CALL) { - func(info); - } - if (ipi.vector & IPI_FLUSH_TLB) { - if (flush_mm == FLUSH_ALL) - __flush_tlb_all(); - else if (flush_vma == FLUSH_ALL) - __flush_tlb_mm(flush_mm); - else - __flush_tlb_page(flush_vma, flush_addr); - } - - ipi.vector = 0; - REG_WR(intr_vect, irq_regs[smp_processor_id()], rw_ipi, ipi); - - return IRQ_HANDLED; -} - diff --git a/arch/cris/arch-v32/kernel/time.c b/arch/cris/arch-v32/kernel/time.c index c17b01a..aa2d94b 100644 --- a/arch/cris/arch-v32/kernel/time.c +++ b/arch/cris/arch-v32/kernel/time.c @@ -60,9 +60,6 @@ arch_initcall(etrax_init_cont_rotime); unsigned long timer_regs[NR_CPUS] = { regi_timer0, -#ifdef CONFIG_SMP - regi_timer2 -#endif }; extern int set_rtc_mmss(unsigned long nowtime); diff --git a/arch/cris/arch-v32/lib/Makefile b/arch/cris/arch-v32/lib/Makefile index dd296b9..e91cf02 100644 --- a/arch/cris/arch-v32/lib/Makefile +++ b/arch/cris/arch-v32/lib/Makefile @@ -3,5 +3,5 @@ # lib-y = checksum.o checksumcopy.o string.o usercopy.o memset.o \ - csumcpfruser.o spinlock.o delay.o strcmp.o + csumcpfruser.o delay.o strcmp.o diff --git a/arch/cris/arch-v32/lib/spinlock.S b/arch/cris/arch-v32/lib/spinlock.S deleted file mode 100644 index fe610b9..0000000 --- a/arch/cris/arch-v32/lib/spinlock.S +++ /dev/null @@ -1,40 +0,0 @@ -;; Core of the spinlock implementation -;; -;; Copyright (C) 2004 Axis Communications AB. -;; -;; Author: Mikael Starvik - - - .global cris_spin_lock - .type cris_spin_lock,@function - .global cris_spin_trylock - .type cris_spin_trylock,@function - - .text - -cris_spin_lock: - clearf p -1: test.b [$r10] - beq 1b - clearf p - ax - clear.b [$r10] - bcs 1b - clearf p - ret - nop - - .size cris_spin_lock, . - cris_spin_lock - -cris_spin_trylock: - clearf p -1: move.b [$r10], $r11 - ax - clear.b [$r10] - bcs 1b - clearf p - ret - movu.b $r11,$r10 - - .size cris_spin_trylock, . - cris_spin_trylock - diff --git a/arch/cris/arch-v32/mm/init.c b/arch/cris/arch-v32/mm/init.c index 3deca52..f5438ca 100644 --- a/arch/cris/arch-v32/mm/init.c +++ b/arch/cris/arch-v32/mm/init.c @@ -40,17 +40,6 @@ void __init cris_mmu_init(void) */ per_cpu(current_pgd, smp_processor_id()) = init_mm.pgd; -#ifdef CONFIG_SMP - { - pgd_t **pgd; - pgd = (pgd_t**)&per_cpu(current_pgd, smp_processor_id()); - SUPP_BANK_SEL(1); - SUPP_REG_WR(RW_MM_TLB_PGD, pgd); - SUPP_BANK_SEL(2); - SUPP_REG_WR(RW_MM_TLB_PGD, pgd); - } -#endif - /* Initialise the TLB. Function found in tlb.c. */ tlb_init(); diff --git a/arch/cris/arch-v32/mm/mmu.S b/arch/cris/arch-v32/mm/mmu.S index 72727c1..c098104 100644 --- a/arch/cris/arch-v32/mm/mmu.S +++ b/arch/cris/arch-v32/mm/mmu.S @@ -115,11 +115,7 @@ move.d $r0, [$r1] ; last_refill_cause = rw_mm_cause 3: ; Probably not in a loop, continue normal processing -#ifdef CONFIG_SMP - move $s7, $acr ; PGD -#else move.d current_pgd, $acr ; PGD -#endif ; Look up PMD in PGD lsrq 24, $r0 ; Get PMD index into PGD (bit 24-31) move.d [$acr], $acr ; PGD for the current process diff --git a/arch/cris/include/arch-v32/arch/atomic.h b/arch/cris/include/arch-v32/arch/atomic.h index 852ceff..9c7d105 100644 --- a/arch/cris/include/arch-v32/arch/atomic.h +++ b/arch/cris/include/arch-v32/arch/atomic.h @@ -1,36 +1,8 @@ #ifndef __ASM_CRIS_ARCH_ATOMIC__ #define __ASM_CRIS_ARCH_ATOMIC__ -#include <linux/spinlock_types.h> - -extern void cris_spin_unlock(void *l, int val); -extern void cris_spin_lock(void *l); -extern int cris_spin_trylock(void* l); - -#ifndef CONFIG_SMP #define cris_atomic_save(addr, flags) local_irq_save(flags); #define cris_atomic_restore(addr, flags) local_irq_restore(flags); -#else - -extern spinlock_t cris_atomic_locks[]; -#define LOCK_COUNT 128 -#define HASH_ADDR(a) (((int)a) & 127) - -#define cris_atomic_save(addr, flags) \ - local_irq_save(flags); \ - cris_spin_lock((void *)&cris_atomic_locks[HASH_ADDR(addr)].raw_lock.slock); - -#define cris_atomic_restore(addr, flags) \ - { \ - spinlock_t *lock = (void*)&cris_atomic_locks[HASH_ADDR(addr)]; \ - __asm__ volatile ("move.d %1,%0" \ - : "=m" (lock->raw_lock.slock) \ - : "r" (1) \ - : "memory"); \ - local_irq_restore(flags); \ - } - -#endif #endif diff --git a/arch/cris/include/arch-v32/arch/spinlock.h b/arch/cris/include/arch-v32/arch/spinlock.h deleted file mode 100644 index f132755..0000000 --- a/arch/cris/include/arch-v32/arch/spinlock.h +++ /dev/null @@ -1,131 +0,0 @@ -#ifndef __ASM_ARCH_SPINLOCK_H -#define __ASM_ARCH_SPINLOCK_H - -#include <linux/spinlock_types.h> - -#define RW_LOCK_BIAS 0x01000000 - -extern void cris_spin_unlock(void *l, int val); -extern void cris_spin_lock(void *l); -extern int cris_spin_trylock(void *l); - -static inline int arch_spin_is_locked(arch_spinlock_t *x) -{ - return *(volatile signed char *)(&(x)->slock) <= 0; -} - -static inline void arch_spin_unlock(arch_spinlock_t *lock) -{ - __asm__ volatile ("move.d %1,%0" \ - : "=m" (lock->slock) \ - : "r" (1) \ - : "memory"); -} - -static inline void arch_spin_unlock_wait(arch_spinlock_t *lock) -{ - while (arch_spin_is_locked(lock)) - cpu_relax(); -} - -static inline int arch_spin_trylock(arch_spinlock_t *lock) -{ - return cris_spin_trylock((void *)&lock->slock); -} - -static inline void arch_spin_lock(arch_spinlock_t *lock) -{ - cris_spin_lock((void *)&lock->slock); -} - -static inline void -arch_spin_lock_flags(arch_spinlock_t *lock, unsigned long flags) -{ - arch_spin_lock(lock); -} - -/* - * Read-write spinlocks, allowing multiple readers - * but only one writer. - * - * NOTE! it is quite common to have readers in interrupts - * but no interrupt writers. For those circumstances we - * can "mix" irq-safe locks - any writer needs to get a - * irq-safe write-lock, but readers can get non-irqsafe - * read-locks. - * - */ - -static inline int arch_read_can_lock(arch_rwlock_t *x) -{ - return (int)(x)->lock > 0; -} - -static inline int arch_write_can_lock(arch_rwlock_t *x) -{ - return (x)->lock == RW_LOCK_BIAS; -} - -static inline void arch_read_lock(arch_rwlock_t *rw) -{ - arch_spin_lock(&rw->slock); - while (rw->lock == 0); - rw->lock--; - arch_spin_unlock(&rw->slock); -} - -static inline void arch_write_lock(arch_rwlock_t *rw) -{ - arch_spin_lock(&rw->slock); - while (rw->lock != RW_LOCK_BIAS); - rw->lock = 0; - arch_spin_unlock(&rw->slock); -} - -static inline void arch_read_unlock(arch_rwlock_t *rw) -{ - arch_spin_lock(&rw->slock); - rw->lock++; - arch_spin_unlock(&rw->slock); -} - -static inline void arch_write_unlock(arch_rwlock_t *rw) -{ - arch_spin_lock(&rw->slock); - while (rw->lock != RW_LOCK_BIAS); - rw->lock = RW_LOCK_BIAS; - arch_spin_unlock(&rw->slock); -} - -static inline int arch_read_trylock(arch_rwlock_t *rw) -{ - int ret = 0; - arch_spin_lock(&rw->slock); - if (rw->lock != 0) { - rw->lock--; - ret = 1; - } - arch_spin_unlock(&rw->slock); - return ret; -} - -static inline int arch_write_trylock(arch_rwlock_t *rw) -{ - int ret = 0; - arch_spin_lock(&rw->slock); - if (rw->lock == RW_LOCK_BIAS) { - rw->lock = 0; - ret = 1; - } - arch_spin_unlock(&rw->slock); - return ret; -} - -#define _raw_read_lock_flags(lock, flags) _raw_read_lock(lock) -#define _raw_write_lock_flags(lock, flags) _raw_write_lock(lock) - -#define arch_spin_relax(lock) cpu_relax() -#define arch_read_relax(lock) cpu_relax() -#define arch_write_relax(lock) cpu_relax() - -#endif /* __ASM_ARCH_SPINLOCK_H */ diff --git a/arch/cris/include/asm/cmpxchg.h b/arch/cris/include/asm/cmpxchg.h index b756dac..deb9048 100644 --- a/arch/cris/include/asm/cmpxchg.h +++ b/arch/cris/include/asm/cmpxchg.h @@ -46,8 +46,6 @@ static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int siz (unsigned long)(n), sizeof(*(ptr)))) #define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n)) -#ifndef CONFIG_SMP #include <asm-generic/cmpxchg.h> -#endif #endif /* __ASM_CRIS_CMPXCHG__ */ diff --git a/arch/cris/include/asm/smp.h b/arch/cris/include/asm/smp.h deleted file mode 100644 index c615a06..0000000 --- a/arch/cris/include/asm/smp.h +++ /dev/null @@ -1,10 +0,0 @@ -#ifndef __ASM_SMP_H -#define __ASM_SMP_H - -#include <linux/cpumask.h> - -extern cpumask_t phys_cpu_present_map; - -#define raw_smp_processor_id() (current_thread_info()->cpu) - -#endif diff --git a/arch/cris/include/asm/spinlock.h b/arch/cris/include/asm/spinlock.h deleted file mode 100644 index ed816b5..0000000 --- a/arch/cris/include/asm/spinlock.h +++ /dev/null @@ -1 +0,0 @@ -#include <arch/spinlock.h> diff --git a/arch/cris/include/asm/tlbflush.h b/arch/cris/include/asm/tlbflush.h index 20697e7..b424f43 100644 --- a/arch/cris/include/asm/tlbflush.h +++ b/arch/cris/include/asm/tlbflush.h @@ -22,16 +22,9 @@ extern void __flush_tlb_mm(struct mm_struct *mm); extern void __flush_tlb_page(struct vm_area_struct *vma, unsigned long addr); -#ifdef CONFIG_SMP -extern void flush_tlb_all(void); -extern void flush_tlb_mm(struct mm_struct *mm); -extern void flush_tlb_page(struct vm_area_struct *vma, - unsigned long addr); -#else #define flush_tlb_all __flush_tlb_all #define flush_tlb_mm __flush_tlb_mm #define flush_tlb_page __flush_tlb_page -#endif static inline void flush_tlb_range(struct vm_area_struct * vma, unsigned long start, unsigned long end) { |