diff options
author | Po Liu <po.liu@nxp.com> | 2017-05-22 07:46:02 (GMT) |
---|---|---|
committer | Xie Xiaobo <xiaobo.xie@nxp.com> | 2017-09-25 07:25:29 (GMT) |
commit | 5be0fc5c16f3588d138aee7165f54abdb2fba01d (patch) | |
tree | 87c5c806051f65d9a49ee73ad5bce751c97a24be | |
parent | 9c2aa654e19e2ac73bb89dc365e48e5b3e906f3f (diff) | |
download | linux-5be0fc5c16f3588d138aee7165f54abdb2fba01d.tar.xz |
pci:add support aer/pme interrupts with none MSI/MSI-X/INTx mode
[pcie part]
On some platforms, root port doesn't support MSI/MSI-X/INTx in RC mode.
When chip support the aer/pme interrupts with none MSI/MSI-X/INTx mode,
maybe there is interrupt line for aer pme etc. Search the interrupt
number in the fdt file. Then fixup the dev->irq with it.
Signed-off-by: Po Liu <po.liu@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Integrated-by: Zhao Qiang <qiang.zhao@nxp.com>
-rw-r--r-- | Documentation/devicetree/bindings/pci/layerscape-pci.txt | 13 | ||||
-rw-r--r-- | drivers/pci/pcie/portdrv_core.c | 29 | ||||
-rw-r--r-- | include/linux/pci.h | 1 |
3 files changed, 39 insertions, 4 deletions
diff --git a/Documentation/devicetree/bindings/pci/layerscape-pci.txt b/Documentation/devicetree/bindings/pci/layerscape-pci.txt index 41e9f55..51ed49e 100644 --- a/Documentation/devicetree/bindings/pci/layerscape-pci.txt +++ b/Documentation/devicetree/bindings/pci/layerscape-pci.txt @@ -18,8 +18,12 @@ Required properties: - reg: base addresses and lengths of the PCIe controller - interrupts: A list of interrupt outputs of the controller. Must contain an entry for each entry in the interrupt-names property. -- interrupt-names: Must include the following entries: - "intr": The interrupt that is asserted for controller interrupts +- interrupt-names: It could include the following entries: + "aer": Asserted for aer interrupt when chip support the aer interrupt with + none MSI/MSI-X/INTx mode,but there is interrupt line for aer. + "pme": Asserted for pme interrupt when chip support the pme interrupt with + none MSI/MSI-X/INTx mode,but there is interrupt line for pme. + ...... - fsl,pcie-scfg: Must include two entries. The first entry must be a link to the SCFG device node The second entry must be '0' or '1' based on physical PCIe controller index. @@ -35,8 +39,9 @@ Example: reg = <0x00 0x03400000 0x0 0x00010000 /* controller registers */ 0x40 0x00000000 0x0 0x00002000>; /* configuration space */ reg-names = "regs", "config"; - interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */ - interrupt-names = "intr"; + interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>, /* aer interrupt */ + <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; /* pme interrupt */ + interrupt-names = "aer", "pme"; fsl,pcie-scfg = <&scfg 0>; #address-cells = <3>; #size-cells = <2>; diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c index cea504f..1bad877 100644 --- a/drivers/pci/pcie/portdrv_core.c +++ b/drivers/pci/pcie/portdrv_core.c @@ -44,6 +44,20 @@ static void release_pcie_device(struct device *dev) } /** + * pcibios_check_service_irqs - check irqs in the device tree + * @dev: PCI Express port to handle + * @irqs: Array of irqs to populate + * @mask: Bitmask of port capabilities returned by get_port_device_capability() + * + * Return value: 0 means no service irqs in the device tree + * + */ +int __weak pcibios_check_service_irqs(struct pci_dev *dev, int *irqs, int mask) +{ + return 0; +} + +/** * pcie_port_enable_msix - try to set up MSI-X as interrupt mode for given port * @dev: PCI Express port to handle * @irqs: Array of interrupt vectors to populate @@ -148,10 +162,25 @@ static int pcie_init_service_irqs(struct pci_dev *dev, int *irqs, int mask) { unsigned flags = PCI_IRQ_LEGACY | PCI_IRQ_MSI; int ret, i; + int irq = -1; for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++) irqs[i] = -1; + /* Check if some platforms owns independent irq pins for AER/PME etc. + * Some platforms may own independent AER/PME interrupts and set + * them in the device tree file. + */ + ret = pcibios_check_service_irqs(dev, irqs, mask); + if (ret) { + if (dev->irq) + irq = dev->irq; + for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++) + if (irqs[i] == -1 && i != PCIE_PORT_SERVICE_VC_SHIFT) + irqs[i] = irq; + return 0; + } + /* * If MSI cannot be used for PCIe PME or hotplug, we have to use * INTx or other interrupts, e.g. system shared interrupt. diff --git a/include/linux/pci.h b/include/linux/pci.h index 1b71179..6738d816 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -1823,6 +1823,7 @@ void pcibios_release_device(struct pci_dev *dev); void pcibios_penalize_isa_irq(int irq, int active); int pcibios_alloc_irq(struct pci_dev *dev); void pcibios_free_irq(struct pci_dev *dev); +int pcibios_check_service_irqs(struct pci_dev *dev, int *irqs, int mask); #ifdef CONFIG_HIBERNATE_CALLBACKS extern struct dev_pm_ops pcibios_pm_ops; |