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| author | Tom St Denis <tom.stdenis@amd.com> | 2016-07-28 13:44:14 (GMT) |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2016-08-08 15:32:38 (GMT) |
| commit | 7acc83d4df77d2ed0153db2583f00a34e31fce92 (patch) | |
| tree | 6bb8fe92c30f0b31bb5f9c28362a5b9d26bb772f | |
| parent | bd12267dd896ff8e3dfd25ac31cbc255e9184715 (diff) | |
| download | linux-7acc83d4df77d2ed0153db2583f00a34e31fce92.tar.xz | |
drm/amd/amdgpu: don't set clockgating in uvd_v6_0_start()
This is handled properly by both DPM and PP externally.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 13 |
1 files changed, 4 insertions, 9 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c index 4fa5091..4dbd5ab 100644 --- a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c @@ -396,15 +396,10 @@ static int uvd_v6_0_start(struct amdgpu_device *adev) uvd_v6_0_mc_resume(adev); - /* Set dynamic clock gating in S/W control mode */ - if (adev->cg_flags & AMD_CG_SUPPORT_UVD_MGCG) { - uvd_v6_0_set_sw_clock_gating(adev); - } else { - /* disable clock gating */ - uint32_t data = RREG32(mmUVD_CGC_CTRL); - data &= ~UVD_CGC_CTRL__DYN_CLOCK_MODE_MASK; - WREG32(mmUVD_CGC_CTRL, data); - } + /* disable clock gating */ + tmp = RREG32(mmUVD_CGC_CTRL); + tmp &= ~UVD_CGC_CTRL__DYN_CLOCK_MODE_MASK; + WREG32(mmUVD_CGC_CTRL, tmp); /* disable interupt */ WREG32_P(mmUVD_MASTINT_EN, 0, ~UVD_MASTINT_EN__VCPU_EN_MASK); |