diff options
author | yangbo lu <yangbo.lu@nxp.com> | 2017-04-21 03:52:36 (GMT) |
---|---|---|
committer | Xie Xiaobo <xiaobo.xie@nxp.com> | 2017-07-14 09:57:23 (GMT) |
commit | 821439fa5b9e423fb14c030878f3d7e1c83f406b (patch) | |
tree | 069fb638ed96dc87fe568cb18083d2d717cf7ae7 | |
parent | 639a4da1672bfa4a611da89eefe4c71a62b98cef (diff) | |
download | linux-821439fa5b9e423fb14c030878f3d7e1c83f406b.tar.xz |
arm64: dts: ls1012a: add eSDHC nodes
There are two eSDHC controllers in LS1012A. This patch is to add
eSDHC nodes for ls1012a dts. Also enable eSDHC for RDB/QDS boards.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
-rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts | 8 | ||||
-rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts | 13 | ||||
-rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 25 |
3 files changed, 46 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts index 40ef468..83c7dcd 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts @@ -130,3 +130,11 @@ &sata { status = "okay"; }; + +&esdhc0 { + status = "okay"; +}; + +&esdhc1 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts index 65d4313..c048b4a 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts @@ -61,3 +61,16 @@ &sata { status = "okay"; }; + +&esdhc0 { + sd-uhs-sdr104; + sd-uhs-sdr50; + sd-uhs-sdr25; + sd-uhs-sdr12; + status = "okay"; +}; + +&esdhc1 { + mmc-hs200-1_8v; + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi index ae47156..f8da1ad 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi @@ -302,6 +302,31 @@ }; }; + esdhc0: esdhc@1560000 { + compatible = "fsl,ls1012a-esdhc", "fsl,esdhc"; + reg = <0x0 0x1560000 0x0 0x10000>; + interrupts = <0 62 0x4>; + clocks = <&clockgen 4 0>; + voltage-ranges = <1800 1800 3300 3300>; + sdhci,auto-cmd12; + big-endian; + bus-width = <4>; + status = "disabled"; + }; + + esdhc1: esdhc@1580000 { + compatible = "fsl,ls1012a-esdhc", "fsl,esdhc"; + reg = <0x0 0x1580000 0x0 0x10000>; + interrupts = <0 65 0x4>; + clocks = <&clockgen 4 0>; + voltage-ranges = <1800 1800 3300 3300>; + sdhci,auto-cmd12; + big-endian; + broken-cd; + bus-width = <4>; + status = "disabled"; + }; + i2c0: i2c@2180000 { compatible = "fsl,vf610-i2c"; #address-cells = <1>; |