diff options
| author | Maarten Lankhorst <dev@mblankhorst.nl> | 2015-11-17 10:15:45 (GMT) |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2016-04-12 15:10:21 (GMT) |
| commit | b664129459f529d403d05570115254534611b52d (patch) | |
| tree | 81b81a558e23c7a099110f6be8e0d3158350dce6 | |
| parent | c90bb7b9b968272aa4ee7fed605105b00407395a (diff) | |
| download | linux-b664129459f529d403d05570115254534611b52d.tar.xz | |
ARM: tegra: Enable watchdog support for Tegra114 and Tegra124
Watchdog support was added to the timer block with Tegra30. Tegra20 did
not have this yet. However, the Tegra114 and Tegra124 DTSI files had an
entry in the compatible string list for "nvidia,tegra20-timer", but not
for "nvidia,tegra30-timer", which is why watchdog support isn't enabled
on them.
Fix this by adding an entry for "nvidia,tegra30-timer" to the compatible
string list of the timer block on Tegra114 and Tegra124.
This allows the watchdog to work on Jetson TK1.
Signed-off-by: Maarten Lankhorst <dev@mblankhorst.nl>
Signed-off-by: Thierry Reding <treding@nvidia.com>
| -rw-r--r-- | arch/arm/boot/dts/tegra114.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/tegra124.dtsi | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi index 5017ed8..cb9393a 100644 --- a/arch/arm/boot/dts/tegra114.dtsi +++ b/arch/arm/boot/dts/tegra114.dtsi @@ -150,7 +150,7 @@ }; timer@60005000 { - compatible = "nvidia,tegra114-timer", "nvidia,tegra20-timer"; + compatible = "nvidia,tegra114-timer", "nvidia,tegra30-timer", "nvidia,tegra20-timer"; reg = <0x60005000 0x400>; interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi index 995289b..e4eac1f 100644 --- a/arch/arm/boot/dts/tegra124.dtsi +++ b/arch/arm/boot/dts/tegra124.dtsi @@ -208,7 +208,7 @@ }; timer@0,60005000 { - compatible = "nvidia,tegra124-timer", "nvidia,tegra20-timer"; + compatible = "nvidia,tegra124-timer", "nvidia,tegra30-timer", "nvidia,tegra20-timer"; reg = <0x0 0x60005000 0x0 0x400>; interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, |