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author | Richard Kuo <rkuo@codeaurora.org> | 2013-02-05 20:23:37 (GMT) |
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committer | Richard Kuo <rkuo@codeaurora.org> | 2013-05-01 00:40:25 (GMT) |
commit | f167063a0c4e97dfbd8e42df76e71022bb2bdb7f (patch) | |
tree | 155b0aa8067ea70d5f1eb6516f6e7a44bfbe1798 | |
parent | 2b3c744c3bcaab14ad2cc0f067d76c2f119085a5 (diff) | |
download | linux-f167063a0c4e97dfbd8e42df76e71022bb2bdb7f.tar.xz |
Hexagon: switch to using the device type for IO mappings
Uncached on our architecture can still have side effects
such as canceled/replayed transactions; device type prevents
this.
Signed-off-by: Richard Kuo <rkuo@codeaurora.org>
-rw-r--r-- | arch/hexagon/include/asm/vm_mmu.h | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/arch/hexagon/include/asm/vm_mmu.h b/arch/hexagon/include/asm/vm_mmu.h index 9a94de7..e67b573 100644 --- a/arch/hexagon/include/asm/vm_mmu.h +++ b/arch/hexagon/include/asm/vm_mmu.h @@ -68,14 +68,13 @@ #define __HEXAGON_C_WB 0x0 /* Write-back, no L2 */ #define __HEXAGON_C_WT 0x1 /* Write-through, no L2 */ +#define __HEXAGON_C_UNC 0x6 /* Uncached memory */ +#if CONFIG_HEXAGON_ARCH_VERSION >= 2 #define __HEXAGON_C_DEV 0x4 /* Device register space */ -#define __HEXAGON_C_WT_L2 0x5 /* Write-through, with L2 */ -/* this really should be #if CONFIG_HEXAGON_ARCH = 2 but that's not defined */ -#if defined(CONFIG_HEXAGON_COMET) || defined(CONFIG_QDSP6_ST1) -#define __HEXAGON_C_UNC __HEXAGON_C_DEV #else -#define __HEXAGON_C_UNC 0x6 /* Uncached memory */ +#define __HEXAGON_C_DEV __HEXAGON_C_UNC #endif +#define __HEXAGON_C_WT_L2 0x5 /* Write-through, with L2 */ #define __HEXAGON_C_WB_L2 0x7 /* Write-back, with L2 */ /* |