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author | David S. Miller <davem@davemloft.net> | 2013-09-21 04:50:41 (GMT) |
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committer | David S. Miller <davem@davemloft.net> | 2013-11-12 23:22:34 (GMT) |
commit | b2d438348024b75a1ee8b66b85d77f569a5dfed8 (patch) | |
tree | 057c725d9d058d326533d0947aedd226adb57540 /CREDITS | |
parent | f998c9c0d663b013e3aa3ba78908396c8c497218 (diff) | |
download | linux-b2d438348024b75a1ee8b66b85d77f569a5dfed8.tar.xz |
sparc64: Make PAGE_OFFSET variable.
Choose PAGE_OFFSET dynamically based upon cpu type.
Original UltraSPARC-I (spitfire) chips only supported a 44-bit
virtual address space.
Newer chips (T4 and later) support 52-bit virtual addresses
and up to 47-bits of physical memory space.
Therefore we have to adjust PAGE_SIZE dynamically based upon
the capabilities of the chip.
Note that this change alone does not allow us to support > 43-bit
physical memory, to do that we need to re-arrange our page table
support. The current encodings of the pmd_t and pgd_t pointers
restricts us to "32 + 11" == 43 bits.
This change can waste quite a bit of memory for the various tables.
In particular, a future change should work to size and allocate
kern_linear_bitmap[] and sparc64_valid_addr_bitmap[] dynamically.
This isn't easy as we really cannot take a TLB miss when accessing
kern_linear_bitmap[]. We'd have to lock it into the TLB or similar.
Signed-off-by: David S. Miller <davem@davemloft.net>
Acked-by: Bob Picco <bob.picco@oracle.com>
Diffstat (limited to 'CREDITS')
0 files changed, 0 insertions, 0 deletions