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authorLinus Torvalds <torvalds@linux-foundation.org>2015-04-13 20:33:20 (GMT)
committerLinus Torvalds <torvalds@linux-foundation.org>2015-04-13 20:33:20 (GMT)
commit07f2d8c63fa439613405760841e41fce3041023f (patch)
treed5ef4a4f4d00b6a04ff2a59e66a6c7238008dff5 /Documentation/cpuidle
parentee799f41eb2bc0484711b0fc942fddf54248289f (diff)
parentcee8f5a6c8c917613dd021552909d071b1dab592 (diff)
downloadlinux-07f2d8c63fa439613405760841e41fce3041023f.tar.xz
Merge branch 'x86-ras-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 RAS changes from Ingo Molnar: "The main changes in this cycle were: - Simplify the CMCI storm logic on Intel CPUs after yet another report about a race in the code (Borislav Petkov) - Enable the MCE threshold irq on AMD CPUs by default (Aravind Gopalakrishnan) - Add AMD-specific MCE-severity grading function. Further error recovery actions will be based on its output (Aravind Gopalakrishnan) - Documentation updates (Borislav Petkov) - ... assorted fixes and cleanups" * 'x86-ras-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/mce/severity: Fix warning about indented braces x86/mce: Define mce_severity function pointer x86/mce: Add an AMD severities-grading function x86/mce: Reindent __mcheck_cpu_apply_quirks() properly x86/mce: Use safe MSR accesses for AMD quirk x86/MCE/AMD: Enable thresholding interrupts by default if supported x86/MCE: Make mce_panic() fatal machine check msg in the same pattern x86/MCE/intel: Cleanup CMCI storm logic Documentation/acpi/einj: Correct and streamline text x86/MCE/AMD: Drop bogus const modifier from AMD's bank4_names()
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