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authorJason Cooper <jason@lakedaemon.net>2014-03-04 05:32:40 (GMT)
committerThomas Gleixner <tglx@linutronix.de>2014-03-04 10:10:17 (GMT)
commiteb9cf4e8ec646a553f3b561d7a9e81acf044d876 (patch)
tree2bc4c27080815741de764b06c74726e7fb7fc79e /Documentation/devicetree/bindings/interrupt-controller
parentd0e3a9719f166a81db3bab1b6ec24f544473316c (diff)
downloadlinux-eb9cf4e8ec646a553f3b561d7a9e81acf044d876.tar.xz
Revert irqchip: irq-dove: Add PMU interrupt controller
This reverts commit 40b367d95fb3d60fc1edb9ba8f6ef52272e48936. Russell King has raised the idea of creating a proper PMU driver for this SoC that would incorporate the functionality currently in this driver. It would also cover the use case for the graphics subsystem on this SoC. To prevent having to maintain the devicetree ABI for this limited interrupt-handler driver, we revert the driver before it hits a mainline tagged release (eg v3.15). Signed-off-by: Jason Cooper <jason@lakedaemon.net> Cc: linux-arm-kernel@lists.infradead.org Cc: Andrew Lunn <andrew@lunn.ch> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@googlemail.com> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Cc: Russell King - ARM Linux <linux@arm.linux.org.uk> Link: http://lkml.kernel.org/r/1393911160-7688-1-git-send-email-jason@lakedaemon.net Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'Documentation/devicetree/bindings/interrupt-controller')
-rw-r--r--Documentation/devicetree/bindings/interrupt-controller/marvell,dove-pmu-intc.txt17
1 files changed, 0 insertions, 17 deletions
diff --git a/Documentation/devicetree/bindings/interrupt-controller/marvell,dove-pmu-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/marvell,dove-pmu-intc.txt
deleted file mode 100644
index 1feb582..0000000
--- a/Documentation/devicetree/bindings/interrupt-controller/marvell,dove-pmu-intc.txt
+++ /dev/null
@@ -1,17 +0,0 @@
-Marvell Dove Power Management Unit interrupt controller
-
-Required properties:
-- compatible: shall be "marvell,dove-pmu-intc"
-- reg: base address of PMU interrupt registers starting with CAUSE register
-- interrupts: PMU interrupt of the main interrupt controller
-- interrupt-controller: identifies the node as an interrupt controller
-- #interrupt-cells: number of cells to encode an interrupt source, shall be 1
-
-Example:
- pmu_intc: pmu-interrupt-ctrl@d0050 {
- compatible = "marvell,dove-pmu-intc";
- interrupt-controller;
- #interrupt-cells = <1>;
- reg = <0xd0050 0x8>;
- interrupts = <33>;
- };