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author | Greg Kroah-Hartman <gregkh@suse.de> | 2011-02-18 20:11:27 (GMT) |
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committer | Greg Kroah-Hartman <gregkh@suse.de> | 2011-02-18 20:11:27 (GMT) |
commit | 80ae3fa5d6712ef3625eff617f72e190645d6361 (patch) | |
tree | fd9be0ecbb4baa6385aa1a75af7ced5f7d691be4 /Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe/usb.txt | |
parent | 59db5b2b9e0327e545ff5764dadcb26062c2ab1f (diff) | |
parent | 85e2efbb1db9a18d218006706d6e4fbeb0216213 (diff) | |
download | linux-80ae3fa5d6712ef3625eff617f72e190645d6361.tar.xz |
Merge 2.6.38-rc5 into staging-next
This is to resolve a merge conflict with:
drivers/staging/zram/zram_drv.c
as pointed out by Stephen Rothwell
Cc: Stephen Rothwell <sfr@canb.auug.org.au>
Cc: Nitin Gupta <ngupta@vflare.org>
Cc: Robert Jennings <rcj@linux.vnet.ibm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe/usb.txt')
-rw-r--r-- | Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe/usb.txt | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe/usb.txt b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe/usb.txt new file mode 100644 index 0000000..9ccd5f3 --- /dev/null +++ b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe/usb.txt @@ -0,0 +1,37 @@ +Freescale QUICC Engine USB Controller + +Required properties: +- compatible : should be "fsl,<chip>-qe-usb", "fsl,mpc8323-qe-usb". +- reg : the first two cells should contain usb registers location and + length, the next two two cells should contain PRAM location and + length. +- interrupts : should contain USB interrupt. +- interrupt-parent : interrupt source phandle. +- fsl,fullspeed-clock : specifies the full speed USB clock source: + "none": clock source is disabled + "brg1" through "brg16": clock source is BRG1-BRG16, respectively + "clk1" through "clk24": clock source is CLK1-CLK24, respectively +- fsl,lowspeed-clock : specifies the low speed USB clock source: + "none": clock source is disabled + "brg1" through "brg16": clock source is BRG1-BRG16, respectively + "clk1" through "clk24": clock source is CLK1-CLK24, respectively +- hub-power-budget : USB power budget for the root hub, in mA. +- gpios : should specify GPIOs in this order: USBOE, USBTP, USBTN, USBRP, + USBRN, SPEED (optional), and POWER (optional). + +Example: + +usb@6c0 { + compatible = "fsl,mpc8360-qe-usb", "fsl,mpc8323-qe-usb"; + reg = <0x6c0 0x40 0x8b00 0x100>; + interrupts = <11>; + interrupt-parent = <&qeic>; + fsl,fullspeed-clock = "clk21"; + gpios = <&qe_pio_b 2 0 /* USBOE */ + &qe_pio_b 3 0 /* USBTP */ + &qe_pio_b 8 0 /* USBTN */ + &qe_pio_b 9 0 /* USBRP */ + &qe_pio_b 11 0 /* USBRN */ + &qe_pio_e 20 0 /* SPEED */ + &qe_pio_e 21 0 /* POWER */>; +}; |