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author | Diana CRACIUN <Diana.Craciun@freescale.com> | 2012-02-01 15:50:34 (GMT) |
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committer | Kumar Gala <galak@kernel.crashing.org> | 2012-03-16 21:15:19 (GMT) |
commit | da3b6c0534c76bc08ce5524342586138687fd106 (patch) | |
tree | e67ea548f1389cf8fca6aa7415451fef30645888 /Documentation/devicetree/bindings/powerpc | |
parent | a2279e3fe484e89f744e03421377d5c0fca9f77d (diff) | |
download | linux-da3b6c0534c76bc08ce5524342586138687fd106.tar.xz |
powerpc/fsl: Added aliased MSIIR register address to MSI node in dts
The MSIIR register for each MSI bank is aliased to a different
address. The MSI node reg property was updated to contain this
address:
e.g. reg = <0x41600 0x200 0x44140 4>;
The first region contains the address and length of the MSI
register set and the second region contains the address of
the aliased MSIIR register at 0x44140.
Signed-off-by: Diana CRACIUN <Diana.Craciun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'Documentation/devicetree/bindings/powerpc')
-rw-r--r-- | Documentation/devicetree/bindings/powerpc/fsl/msi-pic.txt | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/msi-pic.txt b/Documentation/devicetree/bindings/powerpc/fsl/msi-pic.txt index 5d586e1..5693877 100644 --- a/Documentation/devicetree/bindings/powerpc/fsl/msi-pic.txt +++ b/Documentation/devicetree/bindings/powerpc/fsl/msi-pic.txt @@ -6,8 +6,10 @@ Required properties: etc.) and the second is "fsl,mpic-msi" or "fsl,ipic-msi" depending on the parent type. -- reg : should contain the address and the length of the shared message - interrupt register set. +- reg : It may contain one or two regions. The first region should contain + the address and the length of the shared message interrupt register set. + The second region should contain the address of aliased MSIIR register for + platforms that have such an alias. - msi-available-ranges: use <start count> style section to define which msi interrupt can be used in the 256 msi interrupts. This property is |