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author | Elaine Zhang <zhangqing@rock-chips.com> | 2016-04-14 06:20:19 (GMT) |
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committer | Heiko Stuebner <heiko@sntech.de> | 2016-04-20 13:07:27 (GMT) |
commit | 71daabca344b503f98c59e4bdd53a818cd01f2af (patch) | |
tree | db73aa4ae17b0e0833da6f97f247f14fd5865dd2 /Documentation/devicetree/bindings/soc | |
parent | 4506697d9f8537a8d33e9e002f8efceb32d10757 (diff) | |
download | linux-71daabca344b503f98c59e4bdd53a818cd01f2af.tar.xz |
dt-bindings: modify document of Rockchip power domains
Rockchip Socs contain quality of service (qos) blocks managing priority,
bandwidth, etc of the connection of each domain to the interconnect.
These blocks loose state when their domain gets disabled and therefore
need to be saved when disabling and restored when enabling a power-domain.
These qos blocks also are similar over all currently available Rockchip
SoCs.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'Documentation/devicetree/bindings/soc')
-rw-r--r-- | Documentation/devicetree/bindings/soc/rockchip/power_domain.txt | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/soc/rockchip/power_domain.txt b/Documentation/devicetree/bindings/soc/rockchip/power_domain.txt index 98085c8..f909ce0 100644 --- a/Documentation/devicetree/bindings/soc/rockchip/power_domain.txt +++ b/Documentation/devicetree/bindings/soc/rockchip/power_domain.txt @@ -20,6 +20,15 @@ Required properties for power domain sub nodes: "include/dt-bindings/power/rk3399-power.h" - for RK3399 type power domain. - clocks (optional): phandles to clocks which need to be enabled while power domain switches state. +- pm_qos (optional): phandles to qos blocks which need to be saved and restored + while power domain switches state. + +Qos Example: + + qos_gpu: qos_gpu@ffaf0000 { + compatible ="syscon"; + reg = <0x0 0xffaf0000 0x0 0x20>; + }; Example: @@ -32,6 +41,7 @@ Example: pd_gpu { reg = <RK3288_PD_GPU>; clocks = <&cru ACLK_GPU>; + pm_qos = <&qos_gpu>; }; }; |