diff options
author | Ingo Molnar <mingo@kernel.org> | 2014-08-22 08:04:15 (GMT) |
---|---|---|
committer | Ingo Molnar <mingo@kernel.org> | 2014-08-22 08:04:15 (GMT) |
commit | 80b304fd00e8b667775ff791121b61ecd7cd0c03 (patch) | |
tree | b4f2ec59fe062c43343ee4c2f10a6bcd0e4dcd1b /Documentation/devicetree/bindings/spi/spi-davinci.txt | |
parent | fb21b84e7f809ef04b1e5aed5d463cf0d4866638 (diff) | |
parent | 6a7519e81321343165f89abb8b616df186d3e57a (diff) | |
download | linux-80b304fd00e8b667775ff791121b61ecd7cd0c03.tar.xz |
Merge tag 'efi-urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/mfleming/efi into x86/urgent
Pull EFI fixes from Matt Fleming:
* WARN_ON(!spin_is_locked()) always triggers on non-SMP machines.
Swap it for the more canonical lockdep_assert_held() which always
does the right thing - Guenter Roeck
* Assign the correct value to efi.runtime_version on arm64 so that all
the runtime services can be invoked - Semen Protsenko
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/spi/spi-davinci.txt')
-rw-r--r-- | Documentation/devicetree/bindings/spi/spi-davinci.txt | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/spi/spi-davinci.txt b/Documentation/devicetree/bindings/spi/spi-davinci.txt index 6d0ac8d..f80887b 100644 --- a/Documentation/devicetree/bindings/spi/spi-davinci.txt +++ b/Documentation/devicetree/bindings/spi/spi-davinci.txt @@ -8,7 +8,8 @@ Required properties: - "ti,dm6441-spi" for SPI used similar to that on DM644x SoC family - "ti,da830-spi" for SPI used similar to that on DA8xx SoC family - reg: Offset and length of SPI controller register space -- num-cs: Number of chip selects +- num-cs: Number of chip selects. This includes internal as well as + GPIO chip selects. - ti,davinci-spi-intr-line: interrupt line used to connect the SPI IP to the interrupt controller within the SoC. Possible values are 0 and 1. Manual says one of the two possible interrupt @@ -17,6 +18,12 @@ Required properties: - interrupts: interrupt number mapped to CPU. - clocks: spi clk phandle +Optional: +- cs-gpios: gpio chip selects + For example to have 3 internal CS and 2 GPIO CS, user could define + cs-gpios = <0>, <0>, <0>, <&gpio1 30 0>, <&gpio1 31 0>; + where first three are internal CS and last two are GPIO CS. + Example of a NOR flash slave device (n25q032) connected to DaVinci SPI controller device over the SPI bus. |