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authorJisheng Zhang <jszhang@marvell.com>2014-11-12 06:22:53 (GMT)
committerJason Cooper <jason@lakedaemon.net>2014-11-26 16:07:54 (GMT)
commita9d5fcc00e715354d3fec1e8009c5895b5ba65ba (patch)
tree774242702aa8c77c309e4d07ed95ab3dab1abef2 /Documentation/devicetree
parent8876ce7d1cbaca495bd6dee96d371f98e9cfb1eb (diff)
downloadlinux-a9d5fcc00e715354d3fec1e8009c5895b5ba65ba.tar.xz
irqchip: dw-apb-ictl: Enable IRQ_GC_MASK_CACHE_PER_TYPE
The irq_chip_type instances have separate mask registers, so we need to enable IRQ_GC_MASK_CACHE_PER_TYPE to actually handle separate mask registers. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Link: https://lkml.kernel.org/r/1415773374-4629-3-git-send-email-jszhang@marvell.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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