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author | Ley Foon Tan <lftan@altera.com> | 2015-10-23 10:27:13 (GMT) |
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committer | Bjorn Helgaas <bhelgaas@google.com> | 2015-11-03 14:36:58 (GMT) |
commit | af1169b48b179c9db6b5d57e14552cceccbc04eb (patch) | |
tree | 98b6a1b9063851a6c9a3db6691d7e70f2afa65f3 /Documentation/devicetree | |
parent | eaa6111b70a7cb43b7536eacea8ef501fc4fc235 (diff) | |
download | linux-af1169b48b179c9db6b5d57e14552cceccbc04eb.tar.xz |
PCI: altera: Add Altera PCIe MSI driver
Add Altera PCIe MSI driver. This soft IP supports a configurable number of
vectors, which is a DTS parameter.
[bhelgaas: Kconfig depend on PCIE_ALTERA, typos, whitespace]
Signed-off-by: Ley Foon Tan <lftan@altera.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r-- | Documentation/devicetree/bindings/pci/altera-pcie-msi.txt | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pci/altera-pcie-msi.txt b/Documentation/devicetree/bindings/pci/altera-pcie-msi.txt new file mode 100644 index 0000000..09cd3bc --- /dev/null +++ b/Documentation/devicetree/bindings/pci/altera-pcie-msi.txt @@ -0,0 +1,28 @@ +* Altera PCIe MSI controller + +Required properties: +- compatible: should contain "altr,msi-1.0" +- reg: specifies the physical base address of the controller and + the length of the memory mapped region. +- reg-names: must include the following entries: + "csr": CSR registers + "vector_slave": vectors slave port region +- interrupt-parent: interrupt source phandle. +- interrupts: specifies the interrupt source of the parent interrupt + controller. The format of the interrupt specifier depends on the + parent interrupt controller. +- num-vectors: number of vectors, range 1 to 32. +- msi-controller: indicates that this is MSI controller node + + +Example +msi0: msi@0xFF200000 { + compatible = "altr,msi-1.0"; + reg = <0xFF200000 0x00000010 + 0xFF200010 0x00000080>; + reg-names = "csr", "vector_slave"; + interrupt-parent = <&hps_0_arm_gic_0>; + interrupts = <0 42 4>; + msi-controller; + num-vectors = <32>; +}; |